Datenblatt-Suchmaschine für elektronische Bauteile |
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LM2650 Datenblatt(PDF) 5 Page - Texas Instruments |
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LM2650 Datenblatt(HTML) 5 Page - Texas Instruments |
5 / 19 page LM2650 www.ti.com SNVS133C – JUNE 1999 – REVISED APRIL 2013 Electrical Characteristics (continued) VPVIN = 15V, VSLEEP LOGIC = 0V and VSD = 0V unless superseded under Conditions. Typicals and limits appearing in plain type apply for TA = TJ = +25°C. Limits appearing in boldface type apply over the full junction temperature range shown under Operating Ratings. Symbol Parameter Conditions Typ(1) Limit(2) Units IQSD Quiescent Current in Shutdown VSD = 3V (5) 9 μA mode 20/25 μA(max) RDS(on) HS DC On-Resistance IDS = 1A, 130 m Ω Drain-to-Source of the High-Side VSLEEPLOGIC = 3V, 170/245 m Ω(max) Power Switch VFB = 3V, VBOOT = 24V RDS(on) LS DC On-Resistance IDS = 1A, 125 m Ω Drain-to-Source of the Low-Side VFB = 3V 175/245 m Ω(max) Power Switch IL HS Leakage current of the High-Side VPVIN = 18V, VSW = 0V, 100 nA 10 Power Switch VSD = 3V μA(max) IL LS Leakage current of the Low-Side VPVIN = 18V, VSW = 18V, 95 μA 210 Power Switch VSD = 3V μA(max) ILIMIT Active Current Limit of the High- VPVIN = 15V, 5.5 A Side Power Switch VBOOT = 24V, 3.5 A(min) VFB = 3V, 7.5 A(max) VSLEEPLOGIC = 3V, FOSC Oscillator Frequency VFB = VREF −20 mV 90 kHz 80/75 kHz(min) 100/105 kHz(max) FMAX Maximum Oscillator Frequency IFREQ ADJ = 100μA, (6) 315 kHz VFB = VREF −20 mV 270/260 kHz(min) 360/370 kHz(max) DMAX Maximum Duty Cycle VFB = VREF −20 mV, 97 % FOSC Not Adjusted 94/93 %(min) DMIN Minimum Duty Cycle VFB = VREF +50 mV, 2.8 % FOSC Not Adjusted 5 %(min) VDD Internal Rail Voltage IVDD = 1 mA 4.0 V 3.6/3.4 V(min) 4.2/4.3 V(max) VBOOT Bootstrap Regulator Voltage IBOOT = 1 mA 7.5 V (VRegH) 6.5/6.0 V(min) ISS Soft Start Current 10 μA 13.5/20.0 μA(max) VHYST Hysteresis of the Sleep VSLEEPLOGIC = 3V 30 mV Comparator (C2 Figure 16) 10 mV(min) 50 mV(max) VIL of SD 0.95 V(max) VIH of SD 2.10 V(min) VIL of SLEEP LOGIC 0.9 V(max) VIH of SLEEP LOGIC 2.0 V(min) VIL of SYNC 0.50 V(max) VIH of SYNC 1.45 V(min) TSD TJ for Thermal Shutdown 170 °C (5) Quiescent current is the total current flowing into the PVIN and VIN pins. IQ includes the current used to drive the gates of the two NMOS power FETs at the nominal switching frequency. IQS includes no such current. (6) Pulling 100 μA out of FREQ ADJ simulates adjusting the oscillator frequency with a 12.5 kΩ resistor connected from FREQ ADJ to GND. The sleep mode cannot be used at switching frequencies above 250 kHz. Copyright © 1999–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM2650 |
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