Datenblatt-Suchmaschine für elektronische Bauteile |
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SI5346 Datenblatt(PDF) 9 Page - Silicon Laboratories |
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SI5346 Datenblatt(HTML) 9 Page - Silicon Laboratories |
9 / 59 page Si5347/46 Rev. 1.1 9 Common Mode Voltage1,2,3 Normal Mode or Low Power Modes VCM VDDO = 3.3 V LVDS 1.10 1.25 1.35 V LVPECL 1.90 2.05 2.15 VDDO = 2.5 V LVPECL, LVDS 1.15 1.25 1.35 VDDO = 1.8 V sub-LVDS 0.87 0.93 1.00 Rise and Fall Times (20% to 80%) tR/tF Normal Mode — 170 240 ps Low Power Mode — 300 430 Differential Output Impedance2 ZO Normal Mode — 100 — Low Power Mode — 650 — Table 5. Differential Clock Output Specifications (Continued) (VDD = 1.8 V ±5%, VDDA = 3.3V ±5%, VDDO = 1.8 V ±5%, 2.5 V ±5%, or 3.3 V ±5%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. Output amplitude and common mode voltage are programmable through register settings and can be stored in NVM. Each output driver can be programmed independently. The typical normal mode (or low power mode) LVDS maximum is 100 mV (or 80 mV) higher than the TIA/EIA-644 maximum.Refer to the Si5347/46 Family Reference Manual for more suggested output settings. Not all combinations of voltage amplitude and common mode voltages settings are possible. 2. Driver output impedance depends on selected output mode (Normal, Low Power). Refer to the Si5347/46 Family Reference Manual for more information. 3. Measured for 156.25 MHz carrier frequency. Sinewave noise added to VDDO (1.8 V = 50 mVpp, 2.5 V/ 3.3 V = 100 mVpp) and noise spur amplitude measured. 4. Measured across two adjacent outputs, both in LVDS mode, with the victim running at 155.52 MHz and the aggressor at 156.25 MHz. Refer to application note, “AN862: Optimizing Si534x Jitter Performance in Next Generation Internet Infrastructure Systems”, guidance on crosstalk minimization. Note that all active outputs must be terminated when measuring crosstalk. OUTx OUTx Vpp_se Vpp_se Vpp_diff = 2*Vpp_se Vcm Vcm |
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