Si53313

Rev. 1.0

11

2. Functional Description

The Si53313 is a low-jitter, low-skew dual 1:5 differential output buffer with an independent input for each bank.

The device has an any-format input that accepts most common differential or LVCMOS input signals. Each output

bank features control pins to select signal format, output enable, output divider setting and LVCMOS drive strength.

2.1. Universal, Any-Format Input

The Si53313 has a universal input stage that enables simple interfacing to a wide variety of clock formats, including

LVPECL, LVCMOS, LVDS, HCSL, and CML. Tables 15 and 16 summarize the various input ac- and dc-coupling

options supported by the device. Figures 3, 4, and 5 show the recommended input clock termination options.

Figure 3. Differential LVPECL, LVDS, CML AC-Coupled Input Termination

Figure 4. LVCMOS DC-Coupled Input Termination

Table 15. LVPECL, LVCMOS, and LVDS

LVPECL

LVCMOS

LVDS

AC-Couple

DC-Couple

AC-Couple

DC-Couple

AC-Couple

DC-Couple

1.8 V

N/A

N/A

No

No

Yes

No

2.5/3.3 V

Yes

Yes

No

Yes

Yes

Yes

Table 16. HCSL and CML

HCSL

CML

AC-Couple

DC-Couple

AC-Couple

DC-Couple

1.8 V

No

No

Yes

No

2.5/3.3 V

Yes

Yes

Yes

No

Si53313

0.1 µF

0.1 µF

CLKx

CLKx

100



Si53312

1 k



CMOS

Driver

CLKx

= 3. 3 V or2. 5 V

CLKx

50

Rs

1 k



Si53313