Si53323

Rev. 1.0

9

2.2. Input Bias Resistors

Internal bias resistors ensure a differential output low condition in the event that the clock inputs are not connected.

The non-inverting input is biased with a 18.75 k

is biased with a 75 k

Figure 5. Input Bias Resistors

2.3. Input Mux

The Si53323 provides two clock inputs for applications that need to select between one of two clock sources. The

CLK_SEL pin selects the active clock input. The table below summarizes the input and output clock based on the

input mux and output enable pin settings.

Table 12. Input Mux Logic

CLK_SEL

CLK0

CLK1

Q

LL

X

L

H

LH

X

H

L

HX

L

L

H

HX

H

H

L

Notes:

1.

On the next negative transition of CLK0 or CLK1.

CLK0 or

CLK1

+

–