Datenblatt-Suchmaschine für elektronische Bauteile |
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SI53365 Datenblatt(PDF) 1 Page - Silicon Laboratories |
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SI53365 Datenblatt(HTML) 1 Page - Silicon Laboratories |
1 / 14 page Rev. 1.0 4/15 Copyright © 2015 by Silicon Laboratories Si53365 Si53365 1:8 L OW J ITTER CMOS C LOCK B UFFER (<200 MH Z) Features Applications Description The Si53365 is an ultra low jitter eight output LVCMOS buffer. The Si53365 utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from dc to 200 MHz with guaranteed low additive jitter, low skew, and low propagation delay variability. The Si53365 supports operation over the industrial temperature range and can be operated from a 1.8 V, 2.5 V, or 3.3 V supply. Functional Block Diagram 8 LVCMOS outputs Low additive jitter: 125 fs rms typ Wide frequency range: 1 to 200 MHz Asynchronous output enable Low output-output skew: <100 ps RoHS compliant, Pb-free Industrial temperature range: –40 to +85 °C Footprint-compatible with CDCLVC1108 1.8, 2.5, or 3.3 V operation 16-TSSOP High-speed clock distribution Ethernet switch/router Optical Transport Network (OTN) SONET/SDH PCI Express Gen 1/2/3 Storage Telecom Industrial Servers Backplane clock distribution Power Supply Filtering Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 VDD GND OE CLK Patents pending Ordering Information: See page 9. Pin Assignments Q1 Q3 VDD Q2 GND Q5 Q7 CLK OE Q0 GND VDD Q4 Q6 GND VDD 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 |
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Ähnliche Beschreibung - SI53365 |
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