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SL23EP05SI-1T Datenblatt(PDF) 5 Page - Silicon Laboratories |
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SL23EP05SI-1T Datenblatt(HTML) 5 Page - Silicon Laboratories |
5 / 15 page SL23EP05 Rev. 2.2 5 Table 3. AC Electrical Specifications (VDD = 3.3 V and 2.5 V) Parameter Symbol Test Condition Min Typ Max Unit Maximum Frequency (Input=Output) 1 FMAX 3.3 V High Drive 10 — 220 MHz 3.3 V Standard Drive 10 — 200 MHz 2.5 V High Drive 10 — 180 MHz 2.5 V Standard Drive 10 — 167 MHz Input Duty Cycle INDC <135 MHz, VDD = 3.3 V 25 — 75 % <135 MHz, VDD = 2.5 V 40 — 60 % Output Duty Cycle 2 OUTDC <135 MHz, VDD = 3.3 V 45 — 55 % <135 MHz, VDD = 2.5 V 40 — 60 % Rise, Fall Time (3.3V) Measured at: 0.8 to 2.0 V 2 tr/f3.3 High drive, CL = 15 pF, >135 MHz — — 0.5 ns Std drive, CL = 15 pF, <170 MHz — — 1.5 ns High drive, CL = 30 pF, <100 MHz — — 1.5 ns Std drive, CL = 30 pF, <100 MHz — — 2.5 ns Rise, Fall Time (2.5) 2 Measured at: 0.6 to 1.8 V tr/f2.5 High drive, CL = 15 pF, >135 MHz — — 1.5 ns Std drive, CL = 15 pF, <135 MHz — — 2.5 ns High drive, CL = 30 pF, <100 MHz — — 2.5 ns Output-to-Output Skew 2 t1 All outputs CL = 0, 3.3 V supply, 2.5 V power supply, standard drive — 30 90 ps All outputs CL = 0, 2.5 V power supply, high drive — 40 100 ps Delay Time, CLKIN Rising Edge to CLKOUT Rising Edge 2 t2 PLL enabled @ 3.3 V –100 — 100 ps PLL enabled @2.5 V –200 — 200 ps Part-to-Part Skew 2 t3 Measured at VDD/2. Any output to any output, 3.3 V supply –150 — 150 ps Measured at VDD/2. Any output to any output, 2.5 V supply –300 — 300 ps Notes: 1. For the given maximum loading conditions. See CL in Operating Conditions Table. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production. |
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