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DAC5681Z Datenblatt(PDF) 1 Page - Texas Instruments

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Teilenummer DAC5681Z
Bauteilbeschribung  Interpolating Digital-To-Analog Converter
Download  61 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DAC5681Z Datenblatt(HTML) 1 Page - Texas Instruments

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CLKIN
CLKINC
DCLKP
1.2V
Reference
EXTIO
EXTLO
BIASJ
Clock Multiplying
PLL 2x-32x
D0P
D0N
D15P
D15N
DCLKN
SYNCP
SYNCN
IOUTA1
IOUTA2
16bit
DAC
Delay Lock
Loop (DLL)
FIFO Sync Disable
Sync & Control
x2
16
DLL Control
x2
FIR0
Mode Control
SYNC=’0->1'
(transition)
16
PLL Control
Clock
Distribution
FDAC
FDAC/2
PLL Bypass
4
PLL Enable
16
B
A
FIR1
(x2 Bypass)
(x1 Bypass)
TXEnable=’1'
FDAC/4
SW_Sync
47t 76dB HBF
47t 76dB HBF
Sync Disable
13
2
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
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Support &
Community
DAC5681Z
SLLS865G – AUGUST 2007 – REVISED NOVEMBER 2015
DAC5681Z 16-Bit, 1.0 GSPS 2x to 4x Interpolating Digital-To-Analog Converter (DAC)
1 Features
3 Description
The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog
1
16-Bit Digital-to-Analog Converter (DAC)
converter (DAC) with wideband LVDS data input,
1.0 GSPS Update Rate
integrated 2x to 4x interpolation filters, on-board clock
16-Bit Wideband Input LVDS Data Bus
multiplier,
and
internal
voltage
reference.
The
DAC5681Z offers superior linearity, noise, crosstalk,
8 Sample Input FIFO
and PLL phase noise performance.
High Performance
The DAC5681Z integrates a wideband LVDS port
73-dBc ACLR WCDMA TM1 at 180 MHz
with on-chip termination. Full-rate input data can be
2x to 32x Clock Multiplying PLL/VCO
transferred to a single DAC channel, or half-rate and
2x or 4x Interpolation Filters
1/4-rate input data can be interpolated by on-board
2x or 4x FIR filters. Each interpolation FIR is
Stopband Transition 0.4–0.6 Fdata
configurable in either low-pass or high-pass mode,
Filters Configurable in Either Low-Pass or
allowing selection of a higher order output spectral
High-Pass Mode
image. An on-chip delay lock loop (DLL) simplifies
Allows Selection of Higher Order Image
LVDS interfacing by providing skew control for the
LVDS input data clock.
On-Chip 1.2-V Reference
2 to 20-mA Differential Scalable Output
The DAC5681Z is characterized for operation over
the industrial temperature range of –40°C to 85°C
64-Pin 9-mm × 9-mm VQFN Package
and is available in a 64-pin VQFN package. Other
members of the family include the dual-channel,
2 Applications
interpolating DAC5682Z and the single-channel, non-
Cellular Base Stations
interpolating DAC5681.
Broadband Wireless Access (BWA)
Device Information(1)
WiMAX 802.16
PART NUMBER
PACKAGE
BODY SIZE (NOM)
Fixed Wireless Backhaul
DAC5681z
VQFN (64)
9.00 mm × 9.00mm
Cable Modem Termination System (CMTS)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


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