List of figures

M93S46-W M93S56-W M93S66-W

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DocID5124 Rev 7

List of figures

Figure 1: Logic diagram ..............................................................................................................................5

Figure 2: 8-pin package connections..........................................................................................................5

Figure 3: Write sequence with one clock glitch ..........................................................................................9

Figure 4: READ sequence ........................................................................................................................12

Figure 5: WRITE sequence ......................................................................................................................13

Figure 6: WEN and WDS sequences .......................................................................................................13

Figure 7: PAWRITE sequence..................................................................................................................15

Figure 8: WRAL sequence........................................................................................................................15

Figure 9: PREAD sequence......................................................................................................................18

Figure 10: PRWRITE sequence ...............................................................................................................18

Figure 11: PREN sequence ......................................................................................................................19

Figure 12: PRCLEAR sequence ...............................................................................................................19

Figure 13: PRDS sequence ......................................................................................................................20

Figure 14: AC test measurement I/O waveform .......................................................................................23

Figure 15: Synchronous timing (start and op-code input).........................................................................25

Figure 16: Synchronous timing (read or write) .........................................................................................26

Figure 17: Synchronous timing (read or write) .........................................................................................26

Figure 18: SO8N – 8-lead plastic small outline 150 mils body width, package outline ............................27

Figure 19: PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline ..........................................28

Figure 20: TSSOP8 - 8-lead thin shrink small outline, package outline ...................................................29

Figure 21: Ordering information scheme ..................................................................................................30