Functional Description

The ’ACTQ827 line driver is designed to be employed as

memory address driver, clock driver and bus-oriented

transmitter/receiver. The devices have TRI-STATE outputs

controlled by the Output Enable (OE) pins. When the OE is

LOW, the device is transparent. When OE is HIGH, the de-

vice is in TRI-STATE mode.

Function Table

Inputs

Outputs

Function

OE

D

n

O

n

L

H

H

Transparent

L

L

L

Transparent

H

X

Z

High Z

H = HIGH Voltage Level

L = LOW Voltage Level

Z = HIGH Impedance

X = Immaterial

Logic Diagram

DS100249-5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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