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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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PEB20571 Datenblatt(PDF) 82 Page - Infineon Technologies AG |
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PEB20571 Datenblatt(HTML) 82 Page - Infineon Technologies AG |
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82 / 291 page  DELIC Interface Description Preliminary Data Sheet 3-26 2003-08 used as DACK, and A4 of the A-bus or AD-bus coming from the µP must not be used as an address line for the DELIC. In this case A4 is driven internally to ‘0’. Note: In de-multiplexed mode AD4 should be connected to DELIC’s D4input pin. Non-DMA mode This is the default mode (after reset).The general Mailbox and the DMA Mailbox data registers are concatenated into one double-sized general Mailbox, accessible by the µP. This broad Mailbox consists of a dedicated µP Mailbox and a DSP Mailbox. Each of them contains 32 data bytes and 1 command byte. In non-DMA mode, DACK/A4 is used as A4, in order to include the DMA Mailbox data registers in the µP interface address space. 3.4.4 DELIC External Interrupts The DELIC contains only one source for an external interrupt - the general Mailbox. This interrupt source is the OCMD register of the DSP Mailbox. Releasing the interrupt is done by the µP resetting bit OBUSY:BUSY. Masking it may be done by resetting the MASK bit of the µP interface Configuration Register (MCFG:IMASK). The interrupt vector issued is the contents of the DSP Mailbox command register MCMD. In Motorola mode, the interrupt vector is issued upon the first IACK pulse, while in Siemens/Intel mode it is issued upon the second IACK pulse. In the latter case, the interrupt vector due to the first IACK pulse (if needed), should be issued by an external interrupt controller. |
Ähnliche Teilenummer - PEB20571 |
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Ähnliche Beschreibung - PEB20571 |
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