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SN74AHC541DGVR Datenblatt(PDF) 9 Page - Texas Instruments |
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SN74AHC541DGVR Datenblatt(HTML) 9 Page - Texas Instruments |
9 / 29 page OE1 OE2 To Seven Other Channels A1 Y1 1 19 2 18 SN74AHC541, SN54AHC541 www.ti.com SCLS261O – OCTOBER 1995 – REVISED SEPTEMBER 2015 8 Detailed Description 8.1 Overview The SNx4AHC541 octal buffers/drivers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs. If either output-enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state. The outputs provide noninverted data when they are not in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver. 8.2 Functional Block Diagram 8.3 Feature Description The SNx4AHC541 has a wide operating voltage range of 2 V to 5.5 V. It allows down voltage translations while accepting input voltages of up to 5.5 V. The slow edges of the SNx4AHC541 enables the reduction of output ringing. 8.4 Device Functional Modes Table 1 lists the functional modes for the SNx4AHC541 devices. Table 1. Function Table (Each Buffer/Driver) INPUTS OUTPUT Y OE1 OE2 A L L L L L L H H H X X Z X H X Z Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: SN74AHC541 SN54AHC541 |
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