SN74GTL2003PW datasheet(5/25 Pages) TI1

Teilenummer	SN74GTL2003PW

Bauteilbeschribung	8-Bit Bidirectional Low-Voltage Translator

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70

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10

GREF (V)

Vi = 0V

Vi = 2.4V

Vi = 1.7V

C001

SN74GTL2003

www.ti.com

SCDS305B – FEBRUARY 2011 – REVISED JUNE 2015

6.5 Electrical Characteristics

over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS(1)

MIN TYP(1)

MAX

UNIT

VDD = 3 V, VSREF = 1.365 V, VSn or VDn = 0.175 V,

VOL

Low-level output voltage

260

350

mV

Iclamp = 15.2 mA

VIK

Input clamp voltage

II = –18 mA

VGREF = 0 V

–1.2

V

IIH

Gate input leakage

VI = 5 V

VGREF = 0 V

5

µA

CI(GREF)

Gate capacitance

VI = 3 V or 0 V

56

pF

CIO(OFF)

OFF capacitance

VO = 3 V or 0 V

VGREF = 0 V

7.4

pF

CIO(ON)

ON capacitance

VO = 3 V or 0 V

VGREF = 3 V

18.6

pF

VGREF = 4.5 V

3.5

5

VGREF = 3 V

4.4

7

IO = 64 mA

VI = 0 V

VGREF = 2.3 V

5.5

9

VGREF = 1.5 V

67

105

ron

(2)

ON-state resistance

Ω

VGREF = 1.5 V,

IO = 30 mA

9

15

VGREF = 4.5 V

7

10

VI = 2.4 V

VGREF = 3 V

IO = 15 mA

58

80

VI = 1.7 V

VGREF = 2.3 V

50

70

(1)

All typical values are measured at TA = 25°C.

(2)

Measured by the voltage drop between the Sn and the Dn terminals at the indicated current through the switch. ON-state resistance is

determined by the lowest voltage of the two (Sn or Dn) terminals.

6.6 Switching Characteristics

VREF = 1.365 V to 1.635 V, VDD1 = 3 V to 3.6 V, VDD2 = 2.36 V to 2.64 V, GND = 0 V, tr = tf ≤ 3 ns, TA = –40°C to 85°C

(see Figure 6)

(1)

PARAMETER

MIN

TYP(2)

MAX

UNIT

tPLH

(3)

Propagation delay (Sn to Dn, Dn to Sn)

0.5

1.5

5.5

ns

tPD

Propagation delay(4)

250

ps

(1)

CON(max) of 30 pF and a COFF(max) of 15 pF is specified by design.

(2)

All typical values are measured at VDD1 = 3.3 V, VDD2 = 2.5 V, VREF = 1.5 V and TA = 25°C.

(3)

Propagation delay specified by characterization.

(4)

This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON-state

resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).

6.7 Typical Characteristics

Figure 1. ON-Resistance vs GREFTypical Curves

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