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74LVCH16T245ZQLR Datenblatt(PDF) 1 Page - Texas Instruments |
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74LVCH16T245ZQLR Datenblatt(HTML) 1 Page - Texas Instruments |
1 / 30 page To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE 1 47 24 36 48 2 25 13 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVCH16T245 SCES635B – JULY 2005 – REVISED APRIL 2015 SN74LVCH16T245 16-bit Dual-supply Bus Transceiver With Configurable Level-Shifting/Voltage Translation and Tri-State Outputs 1 Features 3 Description This 16-bit noninverting bus transceiver uses two 1 • Control Inputs VIH/VIL Levels are Referenced to separate configurable power-supply rails. The A port VCCA Voltage is designed to track VCCA. VCCA accepts any supply • VCC Isolation Feature – If Either VCC Input is at voltage from 1.65 V to 5.5 V. The B port is designed GND, All Outputs are in the High-Impedance State to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage • Overvoltage-Tolerant Inputs and Outputs Allow bidirectional translation between any of the 1.8-V, Mixed-Voltage-Mode Data Communications 2.5-V, 3.3-V, and 5-V voltage nodes. • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65 V to 5.5 V The SN74LVCH16T245 device control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. Power-Supply Range • Bus Hold on Data Inputs Eliminates the Need for The SN74LVCH16T245 device is designed for External Pullup and Pulldown Resistors asynchronous communication between two data buses. The logic levels of the direction-control (DIR) • Ioff Supports Partial-Power-Down Mode Operation input and the output-enable (OE) input activate either • Latch-Up Performance Exceeds 100 mA Per the B-port outputs or the A-port outputs or place both JESD 78, Class II output ports into the high-impedance mode. The • ESD Protection Exceeds JESD 22 device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are 2 Applications activated. The input circuitry on both A and B ports is • Personal Electronics always active and must have a logic HIGH or LOW • Industrial level applied to prevent excess ICC and ICCZ. • Enterprise Device Information(1) • Telecom PART NUMBER PACKAGE BODY SIZE (NOM) SSOP (48) 15.88 mm × 7.49 mm TSSOP (48) 12.50 mm × 6.10 mm SN74LVCH16T245 TVSOP (48) 9.70 mm × 4.40 mm BGA (56) 7.00 mm × 4.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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