Datenblatt-Suchmaschine für elektronische Bauteile |
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54F74 Datenblatt(PDF) 2 Page - National Semiconductor (TI) |
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54F74 Datenblatt(HTML) 2 Page - National Semiconductor (TI) |
2 / 8 page Connection Diagrams Pin Assignment for DIP SOIC and Flatpak TLF9469 – 1 Pin Assignment for LCC TLF9469 – 2 Unit LoadingFan Out 54F74F Pin Names Description UL Input IIH IIL HIGHLOW Output IOH IOL D1 D2 Data Inputs 1010 20 mA b06 mA CP1 CP2 Clock Pulse Inputs (Active Rising Edge) 1010 20 mA b06 mA CD1 CD2 Direct Clear Inputs (Active LOW) 1030 20 mA b18 mA SD1 SD2 Direct Set Inputs (Active LOW) 1030 20 mA b18 mA Q1 Q1 Q2 Q2 Outputs 50333 b 1 mA20 mA Truth Table Inputs Outputs SD CD CP D Q Q LH X X H L HL X X L H LL X X H H HH L hH L HH L lL H HH L X Q0 Q0 H (h) e HIGH Voltage Level L (l) e LOW Voltage Level X e Immaterial Q0 e Previous Q (Q) before LOW-to-HIGH Clock Transition Lower case letters indicate the state of the referenced input or output one setup time prior to the LOW-to-HIGH clock transition Logic Diagram TLF9469 – 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 2 |
Ähnliche Teilenummer - 54F74 |
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Ähnliche Beschreibung - 54F74 |
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