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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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UT04VS50P-XCC Datenblatt(PDF) 4 Page - Aeroflex Circuit Technology |
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UT04VS50P-XCC Datenblatt(HTML) 4 Page - Aeroflex Circuit Technology |
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4 / 21 page  4 Number Pins Type Description 12 EN4 Digital Input Active high enable for VIN4. Setting this pin low forces VOUT4 low when OVSH=0 (VOUT4 is forced low when OVSH=1) regardless of the value of VIN4. Setting this pin high enables the monitor circuitry for VIN4. 13 VIN4 Analog Input Analog input VIN4. When enabled and dependent on the mode of operation (OVSH), the voltage input is monitored for an under-voltage or over-voltage condition; see Functional Descriptions - Thresholds, Over-voltage Setting/Tolerance. The condition is output on VOUT4 when OVSH=0 and on VOUT2 when OVSH=1. 14 VSS Supply GND Ground. This pin must be tied to system ground to establish a reference for voltage detection. 15 CDLY4 Analog Output External capacitor delay connection. Allows adjustment of the VOUT4 timing after VIN4 becomes valid, when OVSH = 0. See Functional Descriptions - CDLY timing section. 16 VOUT4 Open Drain Digital Output Output of VIN4 monitor when OVSH = 0; inactive when OVSH=1. With INV=0, logic 1 indicates that the VIN4 input is at a valid level. With INV=1, logic 0 indicates that VIN4 is at a valid level. Device contains active pull-down device; requires external pull-up. 17 CDLY2 Analog Output External capacitor delay connection. Allows adjustment of the VOUT2 timing after VIN2 becomes valid. See Functional Descriptions - CDLY timing section. 18 VOUT2 Open Drain Digital Output When OVSH=0, it indicates the signal state of the VIN2 monitor. When OVSH=1, it indicates the combined signal states for VIN2 and VIN4 (under-voltage and over-voltage detection). See Functional Descriptions - Thresholds, Device contains active pull-down device; requires external pull-up. 19 RESET Open Drain Digital Output Active high output indicating a system reset condition is activated by appropriate condition on VOUTx, ENx, or MRB pin. See discussion for state changes and timing information. Device contains active pull- down device; requires external pull-up. 20 CRESET Analog Output External capacitor delay connection. Allows adjustment of RESET timeout, which is the time RESET is held after all reset input conditions are cleared. See Functional Description - CRESET timing section. 21 RESETB Open Drain Digital Output Active low output indicating a system reset condition is activated by appropriate condition on VOUTx, ENx, or MRB pin. See discussion for state changes and timing information. Device contains active pull- down device; requires external pull-up. 22 INV Digital Input When logic 1, inverts the sense of the VOUT3 and VOUT4 outputs. 23 MRB Digital Input Internal Pull-up Master Reset active low input. This forces the RESET/RESETB pins to their active state. See discussion for timing information. |
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Ähnliche Beschreibung - UT04VS50P-XCC |
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