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ADXRS290BCEZ Datenblatt(PDF) 11 Page - Analog Devices |
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ADXRS290BCEZ Datenblatt(HTML) 11 Page - Analog Devices |
11 / 19 page Data Sheet ADXRS290 APPLICATIONS INFORMATION APPLICATION CIRCUIT The ADXRS290 application circuit is shown in Figure 24. The primary communications port is the 4-wire SPI interface. For this device, external pull-up/pull-down resistors are not required for the SPI interface, and these pins can be connected directly to the system microcontroller. Four capacitors are required for proper operation of the device. For optimum device performance, separate the capacitors placed on the VS, VDDI/O, VREG, and CP pins. SCLK SYNC/ASEL CP GND VS PDMX SENS AST VDD I/O VREG 1 2 3 4 5 14 13 12 11 10 TOP VIEW (TERMINAL SIDE DOWN) Not to Scale ADXRS290 2.7V TO 5.25V 2.7V TO 5.25V CREG 1µF CCP 1µF 50V CS 1µF CI/O 1µF SPI BUS Figure 24. Recommended Application Circuit POWER SUPPLY DECOUPLING In many applications, bypass capacitors at VS, VREG, and VDD I/O (as shown in Figure 24) placed close to the ADXRS290 supply pins adequately decouple the gyroscope from noise on the power supply. However, in applications where noise is present at the internal clock frequency, or any harmonic thereof, additional care in power supply bypassing is required because this noise may cause errors in angular rate measurement. If additional decoupling is necessary, a 10 Ω resistor or ferrite bead in series with VS and an additional larger bypass capacitor (2.2 µF or greater) at VS may be helpful. Ensure that the connection from the ADXRS290 ground to the power supply ground be low impedance because noise transmitted through ground has an effect similar to noise transmitted through VS. POWER SEQUENCING The interface voltage level is set with the interface supply voltage VDD I/O, which must be present to ensure that the ADXRS290 does not create a conflict on the communications bus. For single- supply operation, VDDI/O can be the same as the main supply (VS). Conversely, in a dual-supply application, VDD I/O can differ from VS to accommodate the desired interface voltage. When VS is applied, the device enters standby state, where power consumption is minimized, and the device waits for VDD I/O to be applied and for a command to enter measurement mode. Measurement mode is activated by setting Bit B1 in Register 0x10 (POWER_CTL). Clear this bit to return the device to a standby state. In standby mode, the current consumption is reduced to 80 µA (typical). In standby mode, only single-address SPI transactions are performed, which includes reading from or writing to a single register, but does not include writing to or reading from several registers in one command. In standby mode, the gyroscope does not respond to rate outputs. Transition time to measurement mode where offsets settle to within ±1°/s of the final value is <100 ms. SETTING BANDWIDTH The ADXRS290 includes an internal configurable band-pass filter. Both the high-pass and low-pass poles of the filter are adjustable, as shown in Table 5 and Table 6. The filter frequency response is shown in Figure 25 and Figure 26. The group delay of the wideband filter option is less than 0.5 ms (see Figure 18 for filter delay). At power-up, the default condition for the filters is dc for the high-pass filter and 480 Hz for the low-pass filter. Table 5. Low-Pass Filter Pole Locations Bit 2 Filter Bit 1 Filter Bit 0 Filter Frequency (Hz) 0 0 0 480 (Default) 0 0 1 320 0 1 0 160 0 1 1 80 1 0 0 56.6 1 0 1 40 1 1 0 28.3 1 1 1 20 Table 6. High-Pass Filter Pole Locations Bit 7 Filter Bit 6 Filter Bit 5 Filter Bit 4 Filter Frequency (Hz) 0 0 0 0 All pass (default) 0 0 0 1 0.011 0 0 1 0 0.022 0 0 1 1 0.044 0 1 0 0 0.087 0 1 0 1 0.175 0 1 1 0 0.350 0 1 1 1 0.700 1 0 0 0 1.400 1 0 0 1 2.800 1 0 1 0 11.30 Rev. A | Page 11 of 19 |
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