Datenblatt-Suchmaschine für elektronische Bauteile |
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AD9725 Datenblatt(PDF) 9 Page - Analog Devices |
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AD9725 Datenblatt(HTML) 9 Page - Analog Devices |
9 / 16 page Preliminary Technical Data AD9725 Rev. PrA | Page 9 of 16 SERIAL PORT INTERFACE REGISTER MAPS Table 5. Mode Control via SPI Port Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 COMMS 00 SDIODIR DATADIR SWRST SLEEP PDN RESERVED1 RESERVED EXREF 01 RESERVED DATA 02 DATAFMT DDR DCLKPOLI DCLKPOLO DISDCLKO SYNCMAN SYNCUPD SYNCALRM 03 RESERVED 04 RESERVED 05 RESERVED 06 RESERVED 07 RESERVED 08 RESERVED 09 RESERVED 0A RESERVED 0B RESERVED 0C RESERVED VERSION 0D RESERVED RESERVED RESERVED RESERVED VERSION[3] VERSION[2] VERSION[1] VERSION[0] CALMEMCK 0E RESERVED RESERVED CALMEM[1] CALMEM[0] RESERVED CALCKDIV[2] CALCKDIV[1] CALCKDIV[0] MEMRDWR 0F CALSTAT CALEN XFERSTAT XFEREN SMEMWR SMEMRD FMEMRD UNCAL MEMADDR 10 MEMADDR[7] MEMADDR[6] MEMADDR[5] MEMADDR[4] MEMADDR[3] MEMADDR[2] MEMADDR[1] MEMADDR[0] MEMDATA 11 RESERVED RESERVED MEMDATA[5] MEMDATA[4] MEMDATA[3] MEMDATA[2] MEMDATA[1] MEMDATA[0] 1 Reserved registers should be set to Logic 0 (low state) during a write operation, and masked (ignored) during a read operation. Table 6. SPI Register Definitions Register Bit Direction Default Description COMMCTRL(00) SDIODIR 7 1 0 0: SDIO pin configured for input only during data transfer 1: SDIO pin configured for input or output during data transfer DATADIR 6 1 0 0: Serial data uses MSB first format 1: Serial data uses LSB first format SWRST 5 1 0 1: Default all serial register bits, except address 00h SLEEP 4 1 0 1: DAC output current off PDN 3 1 0 1: All analog and digital circuitry, except serial interface, off RESERVED 2 0 0 RESERVED RESERVED 1 0 0 RESERVED EXREF 0 1 0 0: Internal bandgap reference DATACTRL(02) DATAFMT 7 1 0 0: Twos complement input data format 1: Unsigned binary input data format DDR 6 1 0 0: Single Data Rate mode 1: Double Data Rate mode DCLKPOLI 5 1 0 0: Data latched on DATACLKIN rising edge 1: Data latched on DATACLKIN falling edge DCLKPOLO 4 1 0 0: Data latched on DATACLKOUT rising edge 1: Data latched on DATACLKOUT falling edge DISDCLKO 3 1 0 0: DATACLKOUT enabled 1: DATACLKOUT disabled SYNCMAN 2 1 0 0: Automatic synchronization initiated following a SYNCALRM 1: Manual synchronization needed following a SYNCALRM |
Ähnliche Teilenummer - AD9725 |
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Ähnliche Beschreibung - AD9725 |
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