The uwdone bit in the ST register can be connected to the

INT pin of the MID to alert the host processor when

MICROWIRE transmission is completed by setting the inten

bit in this SKR register The INT pin will only be functional as

an interrupt in the Non-multiplexed bus mode in the 28-pin

TP3465 device

operation on a device such as NSC TP3071 COMBO II be-

cause the TP3071 sends data back on the SO pin When

1 the SO pin functions as the SI input pin internally

and feeds the data registers See applications diagrams and

software procedures for more details

The ms bit configures the MID device as a Master of MI-

MICROWIRE Slave mode is described and illustrated in the

applications section

CSChip Select Port Register R W Register

RESET condition CS pins are inputs and the register con-

tains the state of these pins

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

cs7

cs6

cs5

cs4

cs3

cs2

cs1

cs0

The cs0 - 7 bits control the 8, CS input/output port pins.

However, only the cs0 - 3

control bits are available in the

TP3465 device when used in the non-multiplexed bus for-

mat In the multiplexed bus format in TP3465 all 8 CS pins

are accessible

Writing to this register will affect the pins (configured as

outputs in PD register) directly Similarly the state of the

pins which are configured as inputs in the PD registers can

be Read via the same (CS) register When reading the pins

designated as outputs the bits will have a ‘‘1’’ condition

Writing to bits corresponding to input pins will have no effect

on the pins

The state of an output chip select pin may also be con-

trolled by the chip hardware state machine if the user writes

to the FMBD0 – 7 registers The hardware can only bring the

appropriate pin LOW for the duration of the MICROWIRE

transfer and will attempt to set it HIGH at the end of the

transfer If the user has however set this pin to be LOW by

writing to this register it will over-ride the action of the hard-

ware and the pin will remain LOW Thus the user must write

a ‘‘1’’ in the bits that will be controlled by hardware and the

pins must be set as outputs in the PD register

STMICROWIRE Status Register R Register

RESET Condition Read 80 Hex

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

uwdone

0

0

0

0

0

0

0

The uwdone bit (read only) in the ST register can be polled

by the software to determine the end of the MICROWIRE

sion

FMBFirst MICROWIRE Byte R W Register

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

d7

d6

d5

d4

d3

d2

d1

d0

SMBSecond MICROWIRE Byte R W Register

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

d7

d6

d5

d4

d3

d2

d1

d0

The SMB and the FMB data registers are used to communi-

cate to any MICROWIRE device 0 – 7 (connected to pins

CS0 – 7) when controlling the chip select lines via CS regis-

ter (using software) The MICROWIRE parameters for this

mode of operation are defined by the parameters for device

7 ie skp7 in SKP register and mwm7 in MWM register

So when communicating with peripherals requiring different

formats the skp7 and mwm7 bits may need to be re-config-

ured before sending data to each of these devices Example

of communication to 8-bit and 16-bit peripherals are de-

scribed below

Example 1 Communicating with an 8-bit MICROWIRE pe-

ripheral at CS1

Set the skp7 bit to 0 (normal MICROWIRE polarity) and set

the mwm7 to 0 for 1 byte operation Set cs1 bit to 0 to

select the device Write the data into the FMB byte location

so it will be shifted out after the trailing edge of the Write

strobe signal At the end of the MICROWIRE transmission

set the cs1 bit to 1 to de-select the device The 8-bit

STATUS from the peripheral is read from the FMByte loca-

tion

Example 2 Communicating with a 16-bit MICROWIRE pe-

ripheral at CS3

MICROWIRE protocol specifies that the Most Significant Bit

is transmitted first Thus the HIGH byte of data becomes the

First MICROWIRE Byte to be sent out

Set the skp7 bit to 0 (normal MICROWIRE polarity) and set

the mwm7 to 1 for 2 byte operation Set cs3 bit to 0 to

select the device Write the LOW data byte in the SMB reg-

ister and then write the HIGH data byte into the FMB byte

location All 16 data bits are shifted out after the trailing

edge of the Write strobe for the FMB register At the end of

the MICROWIRE transmission set the cs3 bit to 1 to de-

select the device The 16-bit STATUS from the peripheral is

read from the FMB (HIGH data byte) and the SMB (LOW

data byte) locations

FMBD0First MICROWIRE Byte Dev0 R W Register

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

d7

d6

d5

d4

d3

d2

d1

d0

There is

only one set of data registers (FMB and SMB)

which handle the MICROWIRE data communication

The

FMBD0 address accesses the data register FMB but also

provides information for the internal state machine to con-

trol the CS0 pin The MICROWIRE parameters for device 0

are indicated by the state of bits skp0 and mwm0 etc

6