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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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DAC38J82IAAVR Datenblatt(PDF) 1 Page - Texas Instruments |
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DAC38J82IAAVR Datenblatt(HTML) 1 Page - Texas Instruments |
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1 / 122 page  DAC37J82/DAC38J82 16-bit DAC 16-bit DAC xN xN RF Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DAC37J82, DAC38J82 SLASE16B – JANUARY 2014 – REVISED MAY 2014 DAC3xJ82 Dual-Channel, 16-Bit, 1.6/2.5 GSPS, Digital-to-Analog Converters with 12.5 Gbps JESD204B Interface 1 Features 3 Description The pin-compatible DAC37J82/DAC38J82 family is a 1 • Resolution: 16-Bit very low power, 16-bit, dual-channel, 1.6/2.5 GSPS • Maximum Sample Rate: digital to analog converter (DAC) with JESD204B – DAC37J82: 1.6 GSPS interface. The maximum input data rate is 1.23 GSPS. – DAC38J82: 2.5 GSPS • Maximum Input Data Rate: 1.23GSPS Digital data is input to the device through 1, 2, 4 or 8 configurable serial JESD204B lanes running up to • JESD204B Interface 12.5 Gbps with on-chip termination and – 8 JESD204B Serial Input Lanes programmable equalization. The interface allows – 12.5 Gbps Maximum Bit Rate per Lane JESD204B Subclass 1 SYSREF based deterministic latency and full synchronization of multiple devices. – Subclass 1 Multi-DAC synchronization • On-Chip Very Low Jitter PLL The device includes features that simplify the design of complex transmit architectures. Fully bypassable • Selectable 1x -16x Interpolation 2x to 16x digital interpolation filters with over 90 dB of • Independent Complex Mixers with 48-bit NCO/ or stop-band attenuation simplify the data interface and ±n×Fs/8 reconstruction filters. An on-chip 48-bit Numerically • Wideband Digital Quadrature Modulator Controlled Oscillator (NCO) and independent Correction complex mixers allow flexible and accurate carrier placement. • Sinx/x Correction Filters A high-performance low jitter PLL simplifies clocking • Fractional Sample Group Delay Correction of the device without significant impact on the • Flexible Routing to Four Analog Outputs via dynamic range. The digital Quadrature Modulator Output Multiplexer Correction (QMC) and Group Delay Correction (QDC) • 3/4-Wire Serial Control Bus (SPI) enable complete IQ compensation for gain, offset, • Integrated Temperature Sensor phase, and group delay between channels in direct up-conversion applications. A programmable Power • JTAG Boundary Scan Amplifier (PA) protection mechanism is available to • Pin-compatible with Quad-channel provide PA protection in cases when the abnormal DAC37J84/DAC38J84 power behavior of the input data is detected. • Power Dissipation: 1.1W at 2.5GSPS DAC37J82/DAC38J82 family provides four analog • Package: 10x10mm, 144-Ball Flip-Chip BGA outputs, and the data from the internal two digital paths can be routed to any two out of these four DAC 2 Applications outputs via the output multiplexer. • Cellular Base Stations Device Information(1) • Diversity Transmit PART NUMBER PACKAGE BODY SIZE (NOM) • Wideband Communications DAC37J82 FCBGA (144) 10.00 mm x 10.00 mm • Direct Digital Synthesis (DDS) Instruments DAC38J82 FCBGA (144) 10.00 mm x 10.00 mm • Millimeter/Microwave Backhaul (1) For all available packages, see the orderable addendum at • Automated Test Equipment the end of the datasheet. • Cable Infrastructure • Radar 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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