CD54AC08, CD74AC08

QUADRUPLE 2-INPUT POSITIVE-AND GATES

SCHS307C – JANUARY 2001 – REVISED JUNE 2002

1

POST OFFICE BOX 655303

and Balanced Noise Immunity at 30% of the

Supply Voltage

Significantly Reduced Power Consumption

– Fanout to 15 F Devices

Circuit Design

MIL-STD-883, Method 3015

description

The ’AC08 devices are quadruple 2-input positive-AND gates. These devices perform the Boolean function

Y

+ A • BorY + A ) B in positive logic.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – E

Tube

CD74AC08E

CD74AC08E

55

°Cto125°C

SOIC

M

Tube

CD74AC08M

AC08M

–55

°C to 125°C

SOIC – M

Tape and reel

CD74AC08M96

AC08M

CDIP – F

Tube

CD54AC08F3A

CD54AC08F3A

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB

design guidelines are available at www.ti.com/sc/package.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

Y

H

H

H

L

XL

X

L

L

logic diagram, each gate (positive logic)

A

B

Y

Copyright

 2002, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

1Y

2A

2B

2Y

GND

4B

4A

4Y

3B

3A

3Y

CD54AC08 ...F PACKAGE

CD74AC08 ...E OR M PACKAGE

(TOP VIEW)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.