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CD54ACT86 Datenblatt(PDF) 2 Page - Texas Instruments

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Teilenummer CD54ACT86
Bauteilbeschribung  QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

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CD54ACT86, CD74ACT86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SCHS322 – JANUARY 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative
logic symbols.
= 1
EXCLUSIVE OR
These are five equivalent exclusive-OR symbols valid for an CD74AC86 gate in positive logic; negation may be shown at any two ports.
=
2k
2k + 1
LOGIC-IDENTITY ELEMENT
EVEN-PARITY ELEMENT
ODD-PARITY ELEMENT
The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).
The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.
The output is active (high) if
an odd number of inputs
(i.e., only 1 of the 2) are
active.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
– 0.5 V to 6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1)
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC)
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): E package
80
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M package
86
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
– 65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
TA = 25°C
–55
°C to
125
°C
–40
°C to
85
°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
VCC
Supply voltage
4.5
5.5
4.5
5.5
4.5
5.5
V
VIH
High-level input voltage
2
2
2
V
VIL
Low-level input voltage
0.8
0.8
0.8
V
VI
Input voltage
0
VCC
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
IOH
High-level output current
–24
–24
–24
mA
IOL
Low-level output current
24
24
24
mA
∆t/∆v
Input transition rise or fall rate
10
10
10
ns/V
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


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