Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

CDCM1802RGTR Datenblatt(PDF) 7 Page - Texas Instruments

Click here to check the latest version.
Teilenummer CDCM1802RGTR
Bauteilbeschribung  CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output
Download  30 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCM1802RGTR Datenblatt(HTML) 7 Page - Texas Instruments

Back Button CDCM1802RGTR Datasheet HTML 3Page - Texas Instruments CDCM1802RGTR Datasheet HTML 4Page - Texas Instruments CDCM1802RGTR Datasheet HTML 5Page - Texas Instruments CDCM1802RGTR Datasheet HTML 6Page - Texas Instruments CDCM1802RGTR Datasheet HTML 7Page - Texas Instruments CDCM1802RGTR Datasheet HTML 8Page - Texas Instruments CDCM1802RGTR Datasheet HTML 9Page - Texas Instruments CDCM1802RGTR Datasheet HTML 10Page - Texas Instruments CDCM1802RGTR Datasheet HTML 11Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 30 page
background image
CDCM1802
www.ti.com
SCAS759B – APRIL 2004 – REVISED NOVEMBER 2015
6.9 Control Input Characteristics
over operating free-air temperature range (unless otherwise noted)
TEST
PARAMETER
MIN
TYP
MAX
UNIT
CONDITIONS
Rpullup
Internal pullup resistor on S0, S1, and EN input
42
60
78
k
Ω
VIH(H)
Three level input high, S0, S1, and EN pin(1)
0.9 × VDD
V
VIM(M)
Three level input MID, S0, S1, and EN pin
0.3 × VDD
0.7 × VDD
V
VIL(L)
Three level low, S0, S1, and EN pin
0.1 × VDD
V
IIH
Input current, S0, S1, and EN pin
VI = VDD
–5
µA
IIL
Input current, S0, S1, and EN pin
VI = GND
38
85
µA
(1)
Leaving this pin floating automatically pulse the logic level high to VDD through an internal pullup resistor of 60 kΩ.
6.10 Timing Requirements
MIN
NOM
MAX
UNIT
tsu
Setup time, S0, S1, and EN pin before clock IN
25
ns
th
Hold time, S0, S1, and EN pin after clock IN
0
ns
Time between latching the EN low transition and when all outputs are
t(disable)
10
ns
disabled (how much time is required until the outputs turn off)
Time between latching the EN low-to-high transition and when outputs are
t(enable)
enabled based on control settings (how much time passes before the
1
μs
outputs carry valid signals)
6.11 Bias Voltage VBB
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VBB
Output reference voltage
VDD = 3 V–3.6 V, IBB = –0.2 mA
VDD – 1.4
VDD – 1.2
V
Copyright © 2004–2015, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Links: CDCM1802


Ähnliche Teilenummer - CDCM1802RGTR

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Texas Instruments
CDCM1802RGTR TI-CDCM1802RGTR Datasheet
695Kb / 22P
[Old version datasheet]   CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O ADDITIONAL LVCMOS OUTPUT
More results

Ähnliche Beschreibung - CDCM1802RGTR

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Texas Instruments
CDCM1802 TI-CDCM1802 Datasheet
695Kb / 22P
[Old version datasheet]   CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O ADDITIONAL LVCMOS OUTPUT
CDCM1804 TI-CDCM1804 Datasheet
589Kb / 24P
[Old version datasheet]   1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCM1804 TI1-CDCM1804_17 Datasheet
623Kb / 27P
[Old version datasheet]   1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
CDCP1803 TI-CDCP1803 Datasheet
308Kb / 19P
[Old version datasheet]   1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
CDCP1803-EP TI1-CDCP1803-EP Datasheet
595Kb / 24P
[Old version datasheet]   1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
logo
Micrel Semiconductor
SY89874U MICREL-SY89874U Datasheet
180Kb / 10P
   2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
SY89874U MICREL-SY89874U_07 Datasheet
111Kb / 10P
   2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION
logo
Renesas Technology Corp
ICS87001I-01 RENESAS-ICS87001I-01 Datasheet
579Kb / 15P
   LVCMOS/LVTTL Clock Divider
JANUARY 23, 2013
logo
Integrated Device Techn...
8536I-33 IDT-8536I-33 Datasheet
347Kb / 19P
   LVPECL/LVCMOS Fanout Buffer
8T73S208A-01 IDT-8T73S208A-01_16 Datasheet
438Kb / 24P
   2.5V, 3.3V Differential LVPECL Clock Divider and Buffer
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com