Datenblatt-Suchmaschine für elektronische Bauteile |
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CDCVF310PWR Datenblatt(PDF) 5 Page - Texas Instruments |
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CDCVF310PWR Datenblatt(HTML) 5 Page - Texas Instruments |
5 / 16 page www.ti.com ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS (1) TIMING REQUIREMENTS CDCVF310 SCAS771B – AUGUST 2004 – REVISED JANUARY 2008 over operating free-air temperature range (unless otherwise noted) (1) Supply voltage range, VDD –0.5 V to 4.6 V Input voltage range, VI (2) (3) –0.5 V to VDD + 0.5 V Output voltage range, VO (2) (3) –0.5 V to VDD + 0.5 V Input clamp current, IIK (VI < 0 or VI> VDD) ±50 mA Output clamp current, IOK (VO < 0 or VO > VDD) ±50 mA Continuous total output current, IO (VO = 0 to VDD) ±50 mA 88 °C/W, high K Package thermal impedance, θ JA (4): PW package 120 °C/W, low K Storage temperature range Tstg –65 °C to 150°C (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) This value is limited to 4.6 V maximum. (4) The package thermal impedance is calculated in accordance with JESD 51. MIN NOM MAX UNIT 2.3 2.5 Supply voltage, VDD V 3.3 3.6 VDD = 3 V to 3.6 V 0.8 Low-level input voltage, VIL V VDD = 2.3 V to 2.7 V 0.7 VDD = 3 V to 3.6 V 2 High-level input voltage, VIH V VDD = 2.3 V to 2.7 V 1.7 Input voltage, VI 0 VDD V VDD = 3 V to 3.6 V –12 High-level output current, IOH mA VDD = 2.3 V to 2.7 V –6 VDD = 3 V to 3.6 V 12 Low-level output current, IOL mA VDD = 2.3 V to 2.7 V 6 Operating free-air temperature, TA –40 85 °C (1) Unused inputs must be held high or low to prevent them from floating. over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fclk Clock frequency VDD = 2.3 V to 3.6 V, See Figure 7 0 200 MHz Copyright © 2004–2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): CDCVF310 |
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