RT =

1

F x 158 x 10

-12

SM74202

SNOSBA4A – NOVEMBER 2011 – REVISED APRIL 2013

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Current Limit/Current Sense

The SM74202 provides a cycle-by-cycle over current protection function. Current limit is accomplished by an

internal current sense comparator. If the voltage at the current sense comparator input exceeds 0.5V, the output

is immediately terminated. A small RC filter, located near the controller, is recommended to filter noise from the

current sense signal. The CS input has an internal MOSFET which discharges the CS pin capacitance at the

conclusion of every cycle. The discharge device remains on an additional 50ns after the beginning of the new

cycle to attenuate the leading edge spike on the current sense signal.

The SM74202 current sense and PWM comparators are very fast, and may respond to short duration noise

pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated

with the CS filter must be located very close to the SM74202 and connected directly to the pins of the controller

(CS and GND). If a current sense transformer is used, both leads of the transformer secondary should be routed

to the sense resistor and the current sense filter network. A sense resistor located in the source of the primary

power MOSFET may be used for current sensing, but a low inductance resistor is required. When designing with

a current sense resistor all of the noise sensitive low power ground connections should be connected together

local to the controller and a single connection should be made to the high current power ground (sense resistor

ground point).

Oscillator and Sync Capability

A single external resistor connected between the RT and GND pins sets the SM74202 oscillator frequency.

Internal to the device is an oscillator divide by two circuit. This divide by two circuit creates an exact 50% duty

cycle limit function. Because of this, the internal oscillator actually operates at twice the frequency of the output

(OUT). To set a desired output operational frequency (F), the RT resistor can be calculated from:

(1)

The SM74202 can also be synchronized to an external clock. The external clock must have a higher frequency

than the free running oscillator frequency set by the RT resistor. The clock signal should be capacitively coupled

into the RT pin through a 100pF capacitor. A peak voltage level greater than 3.7 Volts at the RT pin is required

for detection of the sync pulse. The sync pulse width should be set between 15 to 150ns by the external

components. The RT resistor is always required, whether the oscillator is free running or externally synchronized.

The voltage at the RT pin is internally regulated at 2 Volts. The RT resistor should be located very close to the

device and connected directly to the pins of the controller (RT and GND).

PWM Comparator

The PWM comparator compares the current ramp signal with the loop error voltage derived from the error

amplifier output. The error amplifier output voltage at the COMP pin is offset by 1.4V and then further attenuated

by a 3:1 resistor divider. The PWM comparator polarity is such that 0 Volts on the COMP pin will result in a zero

duty cycle at the controller output.

Soft Start

The softstart feature allows the power converter to gradually reach the initial steady state operating point, thereby

thresholds are satisfied, an internal 10µA current source charges an external capacitor connected to the SS pin.

The capacitor voltage will ramp up slowly and will limit the COMP pin voltage and the duty cycle of the output

pulses.

Gate Driver and Maximum Duty Cycle Limit

The SM74202 provides an internal gate driver (OUT), which can source and sink a peak current of 1 Amp. The

maximum output duty cycle is precisely equal to 50%. The maximum duty cycle function is accomplished with an

internal toggle flip-flop which ensures an accurate duty cycle limit. The internal oscillator frequency is therefore

twice the operating frequency of the PWM controller (OUT pin).

8

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