Datenblatt-Suchmaschine für elektronische Bauteile |
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DP83934CVUL-20 Datenblatt(PDF) 28 Page - National Semiconductor (TI) |
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DP83934CVUL-20 Datenblatt(HTML) 28 Page - National Semiconductor (TI) |
28 / 104 page 50 Buffer Management (Continued) 543 Receive Descriptor Area (RDA) After the SONIC-T buffers a packet to memory it writes 6 words of status and control information into the RDA reads the link field to the next Receive Descriptor and writes to the in-use field of the current descriptor In 32-bit mode the upper word Dk3116l is not used This unused area in memory should not be used for other purposes since the SONIC-T may still write into these locations Each Receive Descriptor consists of the following sections (Figure 5-6) TLF11719 – 19 FIGURE 5-6 Receive Descriptor Format receive status indicates status of the received packet The SONIC-T writes the Receive Control register values into this field Figure 5-7 shows the receive status format This field is loaded from the contents of the Receive Control register Note that ERR RNT BRD PRO and AMC are configura- tion bits and are programmed during initialization See Sec- tion 633 for the description of the Receive Control register 15 14 13 12 11 10 9 8 ERR RNT BRD PRO AMC LB1 LB0 MC 76 5 4 3 2 1 0 BC LPKT CRS COL CRCR FAER LBK PRX FIGURE 5-7 Receive Status Format byte count gives the length of the complete packet from the start of Destination Address to the end of Frame Check Sequence (FCS) packet pointer a 32-bit pointer that locates the packet in the RBA The SONIC-T writes the contents of the CRBA01 registers into this field sequence numbers this field displays the contents of two 8-bit counters (modulo 256) that sequence the RBAs used and the packets buffered These counters assist the system in determining when an RBA has been completely process- ed The sequence numbers allow the system to tally the packets that have been processed within a particular RBA There are two sequence numbers that describe a packet the RBA Sequence Number and the Packet Sequence Number When a packet is buffered to memory the SONIC-T maintains a single RBA Sequence Number for all packets in an RBA and sequences the Packet Number for succeeding packets in the RBA When the SONIC-T uses the next RBA it increments the RBA Sequence Number and clears the Packet Sequence Number The RBA’s sequence counter is not incremented when the Read RRA command is issued in the Command register The format of the Re- ceive Sequence Numbers is shown in Figure 5-8 These counters are reset during a SONIC-T hardware reset or by writing zero to them 15 8 7 0 RBA Sequence Number Packet Sequence Number (Modulo 256) (Modulo 256) FIGURE 5-8 Receive Sequence Number Format receive link field a 15-bit pointer (A15 – A1) that locates the next receive descriptor The LSB of this field is the End Of List (EOL) bit and indicates the last descriptor in the list (Initialized by the system) in-use field this field provides a handshake between the system and the SONIC-T to indicate the ownership of the descriptor When the system avails a descriptor to the SONIC-T it writes a non-zero value into this field The SONIC-T in turn sets this field to all ‘‘0’s’’ when it has finished processing the descriptor (That is when the CRDA register has advanced to the next receive descriptor) Gen- erally the SONIC-T releases control after writing the status and control information into the RDA If however the SON- IC-T has reached the last descriptor in the list it maintains ownership of the descriptor until the system has appended additional descriptors to the list The SONIC-T then relin- quishes control after receiving the next packet (See Sec- tion 5461 for details on when the SONIC-T writes to this field) The receive packet descriptor format is shown in Fig- ure 5-6 544 Receive Buffer Management Initialization The Receive Resource Descriptor and Buffer areas (RRA RDA RBA) in memory and the appropriate SONIC-T regis- ters must be properly initialized before the SONIC-T begins buffering packets This section describes the initialization process 5441 Initializing The Descriptor Page All descriptor areas (RRA RDA and TDA) used by the SONIC-T reside within areas up to 32k (word) or 16k (long word) pages This page may be placed anywhere within the 32-bit address range by loading the upper 16 address lines into the UTDA URDA and URRA registers 5442 Initializing The RRA The initialization of the RRA consists of loading the four SONIC-T RRA registers and writing the resource descriptor information to memory The RRA registers are loaded with the following values Resource Start Area (RSA) register The RSA is loaded with the lower 16-bit address of the beginning of the RRA Resource End Area (REA) register The REA is loaded with the lower 16-bit address of the end of the RRA The end of the RRA is defined as the address of the last RXrsrcptr0 field in the RRA plus 4 words in 16-bit mode or 4 long words in 32-bit mode (Figure 5-4) Resource Read Pointer (RRP) register The RRP is load- ed with the lower 16-bit address of the first resource de- scriptor the SONIC-T reads Resource Write Pointer (RWP) register The RWP is load- ed with the lower 16-bit address of the next vacant location where a resource descriptor will be placed by the system Note The RWP register must only point to either (1) the RXrsrcptr0 field of one of the RRA Descriptors (2) the memory address that the RSA points to (the start of the RRA) or (3) the memory address that the REA points to (the end of the RRA) When the RWP e RRP compari- son is made it is performed after the complete RRA descriptor has been read and not during the fetch Failure to set the RWP to any of the above values prevents the RWP e RRP comparison from ever becoming true 28 |
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