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DP83934CVUL-20 Datenblatt(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Teile-Nr. DP83934CVUL-20
Beschreibung  MHz SONICTM-T Systems-Oriented Network Interface Controller with Twisted Pair Interface
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Hersteller  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83934CVUL-20 Datenblatt(HTML) 1 Page - National Semiconductor (TI)

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TLF11719
July 1995
DP83934CVUL-2025 MHz SONIC
TM -T
Systems-Oriented Network Interface Controller
with Twisted Pair Interface
General Description
The SONIC-T (Systems-Oriented Network Interface Control-
ler with Twisted Pair) is a second-generation Ethernet Con-
troller designed to meet the demands of today’s high-speed
32- and 16-bit systems Its system interface operates with a
high speed DMA that typically consumes less than 5% of
the bus bandwidth Selectable bus modes provide both big
and little endian byte ordering and a clean interface to stan-
dard microprocessors The linked-list buffer management
system of SONIC-T offers maximum flexibility in a variety of
environments from PC-oriented adapters to high-speed
motherboard designs Furthermore the SONIC-T integrates
a fully-compatible IEEE 8023 EncoderDecoder (ENDEC)
and a Twisted Pair Interface which provide a one-chip solu-
tion for Ethernet when using 10BASE-T
When using
10BASE2 or 10BASE5 the SONIC-T may be paired with the
DP8392 Coaxial Transceiver Interface to achieve a simple
2-chip solution
For increased performance the SONIC-T implements a
unique buffer management scheme to efficiently process
receive and transmit packets in system memory No inter-
mediate packet copy is necessary The receive buffer man-
agement uses three areas in memory for (1) allocating addi-
tional resources (2) indicating status information and (3)
buffering packet data During reception the SONIC-T stores
packets in the buffer area then indicates receive status and
control information in the descriptor area The system allo-
cates more memory resources to the SONIC-T by adding
descriptors to the memory resource area The transmit buff-
er management uses two areas in memory
1 indicating status and control information
2 fetching packet data
The system can create a transmit queue allowing multiple
packets to be transmitted from a single transmit command
The packet data can reside on any arbitrary byte boundary
and can exist in several non-contiguous locations
Features
Y
32-bit non-multiplexed address and data bus
Y
Auto AUITPI selection
Y
High-speed interruptible DMA
Y
Linked-list buffer management maximizes flexibility
Y
Two independent 32-byte transmit and receive FIFOs
Y
Bus compatibility for all standard microprocessors
Y
Supports big and little endian formats
Y
Integrated IEEE 8023 ENDEC
Y
Integrated Twisted Pair Interface
Y
Complete address filtering for up to 16 physical andor
multicast addresses
Y
32-bit general-purpose timer
Y
Loopback diagnostics
Y
Fabricated in low-power CMOS
Y
160 PQFP package
Y
Full network management facilities support the 8023
layer management standard
Y
Integrated support for bridge and repeater applications
System Diagram
IEEE 8023 EthernetThin-Ethernet10BaseT Station
TLF11719 – 1
TRI-STATE
is a registered trademark of National Semiconductor Corporation
SONICTM is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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