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SN74ABT16374 Datenblatt(PDF) 1 Page - Texas Instruments

Teilenummer SN74ABT16374
Bauteilbeschribung  16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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SN74ABT16374 Datenblatt(HTML) 1 Page - Texas Instruments

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SN54ABT16374, SN74ABT16374
16BIT EDGETRIGGERED DTYPE FLIPFLOPS
WITH 3STATE OUTPUTS
SCBS454 - APRIL 1991 - REVISED JULY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS
77251−1443
Copyright
1993, Texas Instruments Incorporated
1
Members of the Texas Instruments
Widebus
 Family
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical V
OLP (Output Ground Bounce)
< 0.8 V at VCC = 5 V, TA = 25°C
Distributed V
CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
High-Drive Outputs (−32-mA I
OH,
64-mA IOL)
Packaged in Plastic 300-mil Shrink
Small-Outline Packages (DL) and 380-mil
Fine-Pitch Ceramic Flat Packages (WD)
Using 25-mil Center-to-Center Spacings
description
The ’ABT16374 is a 16-bit edge-triggered D-type
flip-flop with 3-state outputs designed specifically
for
driving
highly
capacitive
or
relatively
low-impedance loads. It is particularly suitable for
implementing
buffer
registers,
I/O
ports,
bidirectional bus drivers, and working registers.
The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK)
input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components
The output enable (OE) does not affect internal operations of the flip-flop. Old data can be retained or new data
can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT16374 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ABT16374 is characterized for operation over the full military temperature range of − 55
°C to 125°C.
The SN74ABT16374 is characterized for operation from − 40
°C to 85°C.
SN54ABT16374 ...WD PACKAGE
SN74ABT16374 ... DL PACKAGE
(TOP VIEW)
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1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK
Widebus and EPIC-
ΙΙB are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.


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