SN74ALS2232A

64

× 8 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SCAS248 – FEBRUARY 1988 – REVISED MARCH 1990

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POST OFFICE BOX 655303

Outputs

description

This 512-bit memory uses advanced low-power

Schottky IMPACT-X

™ technology and features

high speed and fast fall-through times. It is

organized as 64 words by 8 bits.

A FIFO memory is a storage device that allows

data to be written into and read from its array at

independent data rates. The function is used as a

buffer to couple two buses operating at different

clock rates. This FIFO is designed to process data

at rates from 0 to 40 MHz in a bit-parallel format,

word by word.

Data is written into memory on a low-to-high

transition of the load clock (LDCK) input and is

read out on a low-to-high transition of the unload

clock (UNCK) input. The memory is full when the

number of words clocked in exceeds by 64 the

number of words clocked out. When the memory

is full, LDCK signals have no effect on the data

residing in memory. When the the memory is

empty, UNCK signals have no effect.

Status of the FIFO memory is monitored by the

FULL and EMPTY output flags. The FULL output

is low when the memory is full and high when the

memory is not full. The EMPTY output is low when

the memory is empty and high when it is not

empty.

A low level on the reset (RST) input resets the internal stack control pointers and also sets EMPTY low and FULL

high. The outputs are not reset to any specific logic levels. The first low-to-high transition on LDCK, either after

a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the Q outputs.

The first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and

are at a high-impedance state when the output-enable (OE) input is low. The OE input does not effect either

the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction, but is not

possible in the word-depth direction.

The SN74ALS2232A is characterized for operation from 0

°C to 70°C.

Copyright

© 1990, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

IMPACT-X is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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RST

D0

D1

D2

D3

D4

D5

D6

D7

FULL

LDCK

OE

Q0

Q1

Q2

Q3

GND

Q4

Q5

Q6

Q7

EMPTY

UNCK

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Q2

Q3

GND

NC

Q4

Q5

Q6

D2

D3

NC

D4

D5

D6

426

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NC – No internal connection

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