Datenblatt-Suchmaschine für elektronische Bauteile |
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SN74ALVCH16543DL Datenblatt(PDF) 1 Page - Texas Instruments |
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SN74ALVCH16543DL Datenblatt(HTML) 1 Page - Texas Instruments |
1 / 16 page www.ti.com FEATURES DESCRIPTION DGG OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OEAB 1LEAB 1CEAB GND 1A1 1A2 VCC 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2CEAB 2LEAB 2OEAB 1OEBA 1LEBA 1CEBA GND 1B1 1B2 VCC 1B3 1B4 1B5 GND 1B6 1B7 1B8 2B1 2B2 2B3 GND 2B4 2B5 2B6 VCC 2B7 2B8 GND 2CEBA 2LEBA 2OEBA To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup SN74ALVCH16543 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCES025E – JULY 1995 – REVISED OCTOBER 2004 • Member of the Texas Instruments Widebus™ Family • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) • Latch-Up Performance Exceeds 250 mA Per JESD 17 • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages This 16-bit registered transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using CEBA, LEBA, and OEBA. resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH16543 is characterized for operation from -40 °C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, EPIC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1995–2004, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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