A

Y

SN74AUP1G07

SCES591J – JULY 2004 – REVISED JUNE 2014

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9 Detailed Description

9.1 Overview

The SN74AUP1G07 device is a single buffer gate with open drain output that operates from 0.8 V to 3.6 V. The

output of this single buffer/driver is open drain, and can be connected to other open-drain outputs to implement

active-low wired-OR or active-high wired-AND functions.

The AUP family of devices has quiescent power consumption less than 1ua and comes in the ultra small DPW

package. The DPW package technology is a major breakthrough in IC packaging. Its tiny 0.64 mm square

footprint saves significant board space over other package options while still retaining the traditional

manufacturing friendly lead pitch of 0.5 mm.

for live insertion.

9.2 Functional Block Diagram

9.3 Feature Description

•

•

3.6-V I/O tolerant to support down translation

•

Input hysteresis allows slow input transition and better switching noise immunity at the input

•

•

Low noise due to slower edge rates

9.4 Device Functional Modes

Table 1. Function Table

INPUT

OUTPUT

A

Y

H

H/Z

L

L

10

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