Datenblatt-Suchmaschine für elektronische Bauteile |
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TLC1518IDW Datenblatt(PDF) 6 Page - Texas Instruments |
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TLC1518IDW Datenblatt(HTML) 6 Page - Texas Instruments |
6 / 39 page TLC1514, TLC1518 5-V, 10-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN SLAS252 – DECEMBER 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 control and timing start of the cycle: D When FS is not used ( FS = 1 at the falling edge of CS), the falling edge of CS is the start of the cycle. Input data is shifted in on the rising edge, and output data changes on the falling edge of SCLK. This is typically used for an SPI microcontroller, although it can also be used for a DSP. D When FS is used ( FS is an active signal from a DSP), the falling edge of FS is the start of the cycle. Input data is shifted in on the falling edge, and output data changes on the rising edge of SCLK. This is typically used for a TMS320 DSP. first 4-MSBs: the command register (CMR) The TLC1514/TLC1518 have a 4-bit command set (see Table 1) plus a 12-bit configuration data field. Most of the commands require only the first 4 MSBs, i.e. without the 12-bit data field. NOTE: The device requires a write CFR (configuration register) with 000h data (write A000h to the serial input) at power up to initialize host select mode. The valid commands are listed in Table 1. Table 1. TLC1514/TLC1518 Command Set SDI D(15–12) BINARY, HEX TLC1518 COMMAND TLC1514 COMMAND 0000b 0000h Select analog input channel 0 Select analog input channel 0 0001b 1000h Select analog input channel 1 N/A 0010b 2000h Select analog input channel 2 Select analog input channel 1 0011b 3000h Select analog input channel 3 N/A 0100b 4000h Select analog input channel 4 Select analog input channel 2 0101b 5000h Select analog input channel 5 N/A 0110b 6000h Select analog input channel 6 Select analog input channel 3 0111b 7000h Select analog input channel 7 N/A 1000b 8000h SW power down (analog + reference) 1001b 9000h Read CFR register data shown as SDO D(11–0) 1010b A000h plus data Write CFR followed by 12-bit data 1011b B000h Select test, voltage = (REFP+REFM)/2 1100b C000h Select test, voltage = REFM 1101b D000h Select test, voltage = REFP 1110b E000h FIFO read, FIFO contents shown as SDO D(15–6), D(5–0) = XXXXXX 1111b F000h plus data Reserved 1111b F000h plus data Reserved |
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