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TDA8260TW Datenblatt(PDF) 9 Page - NXP Semiconductors

Teilenummer TDA8260TW
Bauteilbeschribung  Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer
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Hersteller  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8260TW Datenblatt(HTML) 9 Page - NXP Semiconductors

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2004 Sep 03
9
Philips Semiconductors
Product specification
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
TDA8260TW
I2C-bus read mode
I2C-bus read mode: R/W = logic 1 (address LSB;
see Table 7).
When a read sequence is started, all eight bits of the status
byte must be read.
Data can be read from the TDA8260TW by setting the R/W
bit to logic 1. After recognition of its slave address, the
TDA8260TW generates an acknowledge pulse and
transfers the status byte onto the SDA line (MSB first).
Data is valid on the SDA line when the SCL clock signal is
HIGH.
A second data byte can be read from the TDA8260TW if
the microcontroller generates an acknowledge on the SDA
line. End of transmission will occur if no acknowledge is
received from the microcontroller. The TDA8260TW will
then release the data line to allow the microcontroller to
generate a STOP condition.
The POR flag (Power-on reset) is set to logic 1 at
power-on and when VCC goes below 2.7 V. It is reset to
logic 0 when an end-of-data condition is detected by the
TDA8260TW (end of a READ sequence).
The in-lock flag FL indicates that the loop is phase-locked
when set to logic 1.
Table 7
I2C-bus read data format
Notes
1. Acknowledge bit (A).
2. FL is valid only in normal mode.
3. X can be 1 or 0 and needs to be masked in the microcontrollers’ software; MSB is transmitted first.
POWER-ON RESET
Power-on reset flag POR = 1 at power-on.
At power-on, or when the supply voltage drops below 2.7 V, internal registers are reset as shown in Table 8.
Table 8
Status at Power-on reset
Note
1. X = not set.
BYTE
(MSB)
BITS
(LSB)
ACK(1)
Address
1
1
0
0
0
MA1
MA0
1
A
Status byte
POR
FL(2)
X(3)
X(3)
X(3)
X(3)
X(3)
X(3)
BYTE
(MSB)
BITS(1)
(LSB)
Programmable divider (PD1)
0
N14 = X
N13 = X
N12 = X
N11 = X
N10 = X
N9 = X
N8 = X
Programmable divider (PD2)
N7 = X
N6 = X
N5 = X
N4 = X
N3 = X
N12 = X
N1 = X
N0 = X
Control data (CD1)
1
T2 = 0
T1 = 0
T0 = 1
R2 = X
R1 = X
R0 = X
X
Control data (CD2)
C1 = X
C0 = X
XXXXX
X


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