DRVn

DONE

EN/

ONE_SHOT

DELAY/

M_DRV

NOT VALID M_DRV

VALID M_DRV

TPL5111

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SNAS659A – JUNE 2015 – REVISED JULY 2015

Programming (continued)

Figure 12. Manual Power ON in One Shot Mode

7.5.2.1 DELAY/M_DRV

A resistance in the range between 500

Ω and 170kΩ must to be connected to the DELAY/M_DRV pin in order to

switched off and the DELAY/M_DRV pin is internally connected to a digital circuit.

In this state, a logic HIGH applied to the DELAY/M_DRV pin is interpreted by the TPL5111 as a manual power

ON. The manual power ON detection is provided with a de-bounce feature (on both edges) which makes the

TPL5111 insensitive to the glitches on the DELAY/M_DRV.

The DELAY/M_DRV pin must stay HIGH for at least 20ms to be valid. Once a valid signal at DELAY/M_DRV is

understood as a manual power on, the DRVn signal will be asserted within the next 10ms. Its duration will be

according to the programmed time interval (minus 50 ms), or less if the DONE is received.

A manual power ON signal resets all the counters. The counters will restart as soon as a valid manual power ON

signal is recognized and the signal at DELAY/M_DRV pin is asserted LOW. Due to the asynchronous nature of

the manual power ON signal and its arbitrary duration, the HIGH status of the DRVn signal may have an

uncertainty of about ±5ms.

An extended assertion of a logic HIGH at the DELAY/M_DRV pin will turn on DRVn for a time longer than the

programmed time interval. DONE signals received while the DELAY/M_DRV is HIGH are ignored. If the DRVn is

already HIGH the manual power ON is ignored.

7.5.2.2 Circuitry

The manual Power ON may be implemented using a switch (momentary mechanical action). Using a single pole

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