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LM4040-EP Datenblatt(PDF) 2 Page - Texas Instruments

Teilenummer LM4040-EP
Bauteilbeschribung  PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE
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CATHODE
ANODE
_
+
LM4040-EP
SLOS746A
– SEPTEMBER 2011 – REVISED SEPTEMBER 2011
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
Absolute Maximum Ratings
(1)
over free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
IZ
Continuous cathode current
–10
25
mA
TJ
Operating virtual junction temperature
150
°C
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under
"absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
"recommended operating
conditions
" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
LM4040
THERMAL METRIC(1)
DBZ
UNITS
3 PINS
θJA
Junction-to-ambient thermal resistance(2)
320.8
θJC
Junction-to-case thermal resistance
98.2
θJB
Junction-to-board thermal resistance(3)
53.3
°C/W
ψJT
Junction-to-top characterization parameter(4)
3.3
ψJB
Junction-to-board characterization parameter(5)
51.8
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3)
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4)
The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(5)
The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA , using a procedure described in JESD51-2a (sections 6 and 7).
2
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© 2011, Texas Instruments Incorporated


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