Datenblatt-Suchmaschine für elektronische Bauteile |
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CS5525-AP Datenblatt(PDF) 10 Page - Cirrus Logic |
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CS5525-AP Datenblatt(HTML) 10 Page - Cirrus Logic |
10 / 29 page CS5525 CS5526 10 DS202F3 System Initialization When power to the CS5525/26 is applied, they are held in a reset condition until their 32.768 kHz os- cillators have started and their start-up counter-tim- er elapses. Due to the high Q of a 32.768 kHz crystal, the oscillators take 400-600 ms to start. The converter’s counter-timer counts no more than 1024 oscillator clock cycles to make sure the oscil- lator is fully stable. During this time-out period the serial port logic is reset and the RV (Reset Valid) bit in the configuration register is set. A reset can be initiated at any time by writing a logic 1 to the RS (Reset System) bit in the configuration register. This automatically sets the RV bit until the RS bit is written to logic 0, and the configuration register is read. After a reset, the on-chip registers are ini- tialized to the following states and the converters are ready to perform conversions. Command Operation The CS5525/26 include a microcontroller with five registers used to control the converter. Each regis- ter is 24-bits in length except the 8-bit command register (command, configuration, offset, gain, and conversion data). After a system initialization or re- set, the serial port is initialized to the command mode and the converter stays in this mode until a valid 8-bit command is received (the first 8-bits into the serial port). Table 1 lists all the valid com- mands. Once a valid 8-bit command (a read or a write command word) is received and interpreted by the command register, the serial port enters the data mode. In data mode the next 24 serial clock pulses shift data either into or out of the serial port (72 serial clock pulses are needed if set-up register is selected). See Table 2 for configuring the CS5525/26. XO U T VD + VA+ VR E F+ VR E F - DG ND NB V AIN + AIN - SCLK SDO SDI C S 5525 XIN CPD CS 10 Ω +5V Analog S upply 0.1 µF0.1 µF + - 20 19 3 4 1 AG ND 213 11 14 17 18 12 5 Se rial Data In te rface 30 m V F.S . 8 16 A3 15 A2 7 A1 6 A0 C S 5526 10 9 O ptional Cloc k S ource 32.768 ~ 100kH z 20 pF 500k Ω Figure 5. CS5525/26 Configured for Single Supply Bridge Measurement. configuration register: 000040(H) offset register: 000000(H) gain register: 800000(H) |
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