OPTIMIZING TRANSIENT RESPONSE

Referring to

Figure 9, there are three components (R1, R2

and L1) that can be adjusted to optimize the transient re-

sponse of the application circuit. Increasing the values of R1

and R2 will slow the circuit down while decreasing over-

shoot. Increasing the value of L1 will speed up the circuit as

well as increase overshoot. It is very important to use induc-

tors with very high self-resonant frequencies, preferably

above 300 MHz. Ferrite core inductors from J.W. Miller Mag-

netics (part # 78FR56M) were used for optimizing the perfor-

mance of the device in the NSC application board. The val-

ues shown in

Figure 9 can be used as a good starting point

for the evaluation of the LM2407. The NSC demo board also

has a position open to add a resistor in parallel with L1. This

resistor can be used to help control overshoot. Using vari-

able resistors for R1 and the parallel resistor is a great way

to help dial in the values needed for optimum performance in

a given application. Once the optimum values are deter-

mined the variable resistors can be replaced with fixed val-

ues.

Effect of Load Capacitance

Figure 8 shows the effect of increased load capacitance on

the speed of the device. This demonstrates the importance

of knowing the load capacitance in the application. The pre-

vious section discussed how to optimize the transient re-

sponse in the application with the use of a series inductor.

Effect of Offset

Figure 7 shows the variation in rise and fall times when the

output offset of the device is varied from 40 V

The rise time shows a maximum variation relative to the cen-

ter data point (45 V

variation of about 5% relative to the center data point.

THERMAL CONSIDERATIONS

Figure 4 shows the performance of the LM2407 in the test

circuit shown in

Figure 2 as a function of case temperature.

The figure shows that the rise time of the LM2407 decreases

by approximately 5% as the case temperature increases

from 50˚C to 100˚C. This corresponds to a speed degrada-

tion of 1% for every 10˚C rise in case temperature. There is

a negligible change in fall time versus temperature in the test

circuit.

Figure 6 shows the total power dissipation of the LM2407 vs.

Frequency when all three channels of the device are driving

an 8 pF load with a 40V

active time (device operating at the specified frequency)

which is typical in a monitor application. The other 28% of

the time the device is assumed to be sitting at the black level

(65V in this case). This graph gives the designer the informa-

tion needed to determine the heat sink requirement for his

application. The designer should note that if the load capaci-

tance is increased the AC component of the total power dis-

sipation will also increase.

The LM2407 case temperature must be maintained below

100˚C. If the maximum expected ambient temperature is

50˚C and the maximum power dissipation is 6.2W, then a

maximum heat sink thermal resistance can be calculated:

This example assumes a capacitive load of 8 pF and no re-

sistive load.

TYPICAL APPLICATION

A typical application of the LM2407 is shown in

Figure 10.

Used in conjunction with an LM1279, a complete video chan-

nel from monitor input to CRT cathode can be achieved. Per-

formance is ideal for 1024 x 768 resolution displays with

pixel clock frequencies up to 100 MHz.

Figure 10 is the sche-

matic for the NSC demonstration board that can be used to

evaluate the LM1279/2407 combination in a monitor.

PC Board Layout Considerations

For optimum performance, an adequate ground plane, isola-

tion between channels, good supply bypassing and minimiz-

ing unwanted feedback are necessary. Also, the length of the

signal traces from the preamplifier to the LM2407 and from

the LM2407 to the CRT cathode should be as short as pos-

sible. The following references are recommended:

Ott, Henry W., “Noise Reduction Techniques in Electronic

Systems” 2nd Edition, John Wiley & Sons, New York, 1988.

“Guide to CRT Video Design”, National Semiconductor Appli-

cation Note 861.

“Video Amplifier Design for Computer Monitors”, National

Semiconductor Application Note 1013.

Pease,

Robert A.,

“Troubleshooting Analog

Circuits”,

Butterworth-Heinemann, 1991.

Because of its high small signal bandwidth, the part may os-

cillate in a monitor if feedback occurs around the video chan-

nel through the chassis wiring. To prevent this, leads to the

video amplifier input circuit should be shielded, and input cir-

cuit wiring should be spaced as far as possible from output

circuit wiring.

NSC Demonstration Board

Figure 11 shows routing and component placement on the

NSC LM1279/2407 demonstration board. The schematic of

the board is shown in

Figure 10. This board provides a good

example of a layout that can be used as a guide for future

layouts. Note the location of the following components:

•

C55 — V

and ground pins

•

C43, C44 — V

10 and ground

•

C53–C55 — V

V

The routing of the LM2407 outputs to the CRT is very critical

to achieving optimum performance.

Figure 12 shows the

routing and component placement from pin 1 of the LM2407

to the blue cathode. Note that the components are placed so

that they almost line up from the output pin of the LM2407 to

the blue cathode pin of the CRT connector. This is done to

minimize the length of the video path between these two

components. Note also that D14, D15, R29 and D13 are

placed to minimize the size of the video nodes that they are

attached to. This minimizes parasitic capacitance in the

video path and also enhances the effectiveness of the pro-

tection diodes. The anode of protection diode D14 is con-

nected directly to a section of the the ground plane that has

a short and direct path to the LM2407 ground pins. The cath-

ode of D15 is connected to V

pacitor C55 (see

Figure 12) which is connected to the same

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