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NBSG86A Datenblatt(PDF) 5 Page - ON Semiconductor

Teilenummer NBSG86A
Bauteilbeschribung  2.5V/3.3V SiGe Differential Smart Gate with Output Level Select
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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Table 7. Interfacing Options
INTERFACING OPTIONS
CONNECTIONS
CML
Connect VTD0, VTD1, VTSEL and VTD0, VTD1 to VCC
LVDS
Connect VTD0, VTD1, VTD0 and VTD1 together. Leave VTSEL open.
AC−COUPLED
Bias VTD0, VTD1, VTSEL and VTD0, VTD1 Inputs within (VIHCMR) Common Mode Range
RSECL, PECL, NECL
Standard ECL Termination Techniques
LVTTL, LVCMOS
An external voltage should be applied to the unused complementary differential input.
Nominal voltage 1.5 V for LVTTL and VCC/2 for LVCMOS inputs.
Table 8. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistors
(R1)
75 k
W
Internal Input Pullup Resistor
(R2)
37.5 k
W
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 1 KV
> 50 V
> 4 KV
Moisture Sensitivity (Note 6)
Pb−Free
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
6. For additional information, see Application Note AND8003/D.
Table 9. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
Positive Power Supply
VEE = 0 V
3.6
V
VEE
Negative Power Supply
VCC = 0 V
−3.6
V
VI
Positive Input
Negative Input
VEE = 0 V
VCC = 0 V
VI v VCC
VI w VEE
3.6
−3.6
V
V
VINPP
Differential Input Voltage |Dn − Dn|, |SEL − SEL|
VCC − VEE w 2.8 V
VCC − VEE < 2.8 V
2.8
|VCC − VEE|
V
V
IIN
Input Current Through RT (50 W Resistor)
Static
Surge
45
80
mA
mA
Iout
Output Current
Continuous
Surge
25
50
mA
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
(Note 7)
0 lfpm
500 lfpm
41.6
35.2
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
2S2P (Note 7)
4.0
°C/W
Tsol
Wave Solder
Pb−Free
< 3 sec @ 260
°C
265
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
7. JEDEC standard multilayer board − 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad.


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