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MC14516BDG Datenblatt(PDF) 9 Page - ON Semiconductor |
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MC14516BDG Datenblatt(HTML) 9 Page - ON Semiconductor |
9 / 10 page MC14516B http://onsemi.com 9 Figure 4. Programmable Cascaded Frequency Divider NOTE: The programmable frequency divider can be set by applying the desired divide ratio, in binary, to the preset inputs. For example, the maximum divide ratio of 255 may be obtained by applying a 1111 1111 to the preset inputs P0 to P7. For this divide operation, both counters should be configured in the count down mode. The divide ratio of zero is an undefined state and should be avoided. BUFFER fout M.S.D. MC14516B L.S.D. MC14516B THUMBWHEEL SWITCHES (OPEN FOR “0") +VDD +VDD Cout +VDD OPEN = COUNT Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q0 Q1 Q2 Q3 P0 P1 P2 P3 P0 P1 P2 P3 PE R U/D CLOCK Cin Cout Q0 Q1 Q2 Q3 P0 P1 P2 P3 PE R U/D CLOCK Cin P4 P5 P6 P7 CLOCK (fin) RESET RESISTORS = 10 k W fout = fin n |
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