BD37514FS_15 datasheet(11/31 Pages) ROHM

Teilenummer	BD37514FS

Bauteilbeschribung	Sound Processor with Built-in 2-band Equalizer

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Hersteller	ROHM [Rohm]

Direct Link	http://www.rohm.com

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11 / 31 page

BD37514FS

11/27

TSZ02201-0C2C0E100440-1-2

www.rohm.com

TSZ22111・15・001

16.Dec.2015 Rev.001

(2) I2C BUS FORMAT

MSB

LSB

MSB

LSB

MSB

LSB

S

Slave Address

A

Select Address

A

Data

A

P

1bit

8bit

1bit

8bit

1bit

8bit

1bit 1bit

S

= Start condition (Recognition of start bit)

Slave Address

= Recognition of slave address. The first 7 bits correspond to the slave address.

The least significant bit is

“L” which corresponds to write mode.

A

= ACKNOWLEDGE bit (Recognition of acknowledgement)

Select Address

= Select address corresponding to volume, bass or treble.

Data

= Data on every volume and tone.

P

= Stop condition (Recognition of stop bit)

(3) I2C BUS Interface Protocol

(a) Basic Format

S

Slave Address

A

Select Address

A

Data

A

P

MSB

LSB

MSB

LSB

MSB

LSB

(b) Automatic Increment (Select Address increases (+1) according to the number of data.)

S

Slave Address

A

Select Address

A

Data1

A

Data2

A

････

DataN

A

P

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

(Example)

① Data1 shall be set as data of address specified by Select Address.

② Data2 shall be set as data of address specified by Select Address +1.

③ DataN shall be set as data of address specified by Select Address +N-1.

(c) Configuration Unavailable for Transmission (In this case, only Select Address1 is set.)

S

Slave Address

A

Select Address1

A

Data

A

Select Address 2

A

Data

A

P

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

(Note) If any data is transmitted as Select Address 2 next to data, it is recognized

as data, not as Select Address 2.

(4) Slave Address

MSB

LSB

A6

A5

A4

A3

A2

A1

A0

R/W

1

0

80H

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