PIN

FUNCTION

PIN

FUNCTION

1

OUTPUT ENABLE (OE)

24

DGND

2

DGND

23

3

BIT 8 (LSB)

22

4

BIT 7

21

AGND

5

BIT 6

20

AGND

6

BIT 5

19

7

BIT 4

18

8

BIT 3

17

9

BIT 2

16

10

BIT 1 (MSB)

15

11

14

12

CLOCK INPUT (A/D CLK)

13

FEATURES

• 8-bit resolution, 20MHz min. sampling rate

• ±½LSB max. differential nonlinearity error

• 18MHz input signal bandwidth

• Subranging, S&H enclosed

• +5V single power, low 85mW max. dissipation

• CMOS compatible logic input

• 3-State TTL compatible output

Figure 1. Functional Block Diagram

INPUT/OUTPUT CONNECTIONS

ADC-305

8-Bit, 20MHz

CMOS A/D Converters

Both the ADC-305-1 and the ADC-305-3 have the same pin assignment.

GENERAL DESCRIPTION

DATEL's ADC-305 is an 8-bit, 20MHz sampling, CMOS,

subranging (two-pass) A/D converter. It processes signals at

speeds comparable to a full flash converter by using a sub-

ranging conversion technique with multiple comparator blocks,

each containing a sample and hold amplifier.

The ADC-305 features CMOS low power dissipation (60mW

typical) and a wide 18MHz (–1dB) input signal bandwidth.

The ADC-305-1 is packaged in 400 mil 24-pin DIP and the

ADC-305-3 in 300 mil 24-pin SOP.

Other features are CMOS compatible input logic, 3-state TTL

compatible output logic, +5V single power operation, self bias

mode and low cost.

DATEL, Inc., Mansfield, MA 02048-1151 (USA)

• Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 • Email: sales@datel.com • Internet www.datel.com

UPPER

ENCODER

(4 BIT)

24 DGND

OUTPUT ENABLE 1

A/D CLK 12

BIT 8 (LSB) 3

BIT 1 (MSB) 10

BIT 7 4

21 AGND

20 AGND

REFERENCE

VOLTAGE

B BLOCK

COMPARATORS

WITH S/H (4 BIT)

UPPER

COMPARATORS

WITH S/H (4 BIT)

LOWER

ENCODER

(4 BIT)

LOWER

ENCODER

(4 BIT)

CLOCK

GENERATOR

UPPER

DATA

LATCHES

LOWER

DATA

LATCHES

A BLOCK

COMPARATORS

WITH S/H (4 BIT)

DGND 2

BIT 6 5

BIT 5 6

BIT 4 7

BIT 3 8

BIT 2 9

®

®