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MC14560B Datenblatt(PDF) 8 Page - Motorola, Inc

Teilenummer MC14560B
Bauteilbeschribung  NBCD Adder
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Hersteller  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC14560B Datenblatt(HTML) 8 Page - Motorola, Inc

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MOTOROLA CMOS LOGIC DATA
MC14560B
8
SUMMARY
The concepts of binary code representations for decimal
numbers, addition, and complement subtraction were dis-
cussed in detail. Using the basic Adder and Complementer
MSI blocks, adder/subtracters for both signed and unsigned
numbers were illustrated with examples.
REFERENCES
1. Chu, Y.:
Digital Computer Design Fundamentals, New
York, McGraw–Hill, 1962.
2.
McMOS Handbook, Motorola Inc., 1st Edition.
3. Beuscher, H.:
Electronic Switching Theory and Circuits,
New York, Van Nostrand Reinhold, 1971.
4. Garrett, L.: CMOS May Help Majority Logic Win De-
signer’s Vote,
Electronics, July 19, 1973.
5. Richards, R.:
Digital Design, New York, Wiley–
Interscience, 1971.
Figure 7. Adder/Subtracter for Unsigned NBCD Numbers
A1
B1
A2
B2
An
Bn
Cin
C
Cout
Cin
C
Cout
Cin
C
Cout
R1
R2
Rn
MSD
BASIC
SUBTRACT
BLOCK
LSD
ADD/SUBTRACT
(“1”/“0”)
1/6 MC14572
1/6 MC14572
OVERFLOW = “1”
UNDERFLOW = “1”
(NEGATIVE RESULT)
Typical Add/Subtract Time = 0.6 + 0.4 n
µs
where n = Number of Decades


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