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SI500D Datenblatt(PDF) 2 Page - Silicon Laboratories

Teilenummer SI500D
Bauteilbeschribung  Highly reliable startup and operation
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Hersteller  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI500D Datenblatt(HTML) 2 Page - Silicon Laboratories

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Si500D
2
Rev. 1.1
Supply Current
LVPECL
34.0
36.0
mA
Low Power LVPECL
19.3
22.2
mA
LVDS
14.9
16.5
mA
HCSL
25.3
29.3
mA
Differential CMOS(3.3 V option,
10 pF on each output, 200 MHz)
—33
36
mA
Differential CMOS(3.3 V option,
1 pFon each output, 40 MHz)
—16
mA
Differential SSTL-3.3
24.5
27.7
mA
Differential SSTL-2.5
24.3
26.7
mA
Differential SSTL-1.8
22.2
25
mA
Tri-State
9.7
10.7
mA
Powerdown
1.0
1.9
mA
Output Symmetry
VDIFF = 0
46 – 13 ns/TCLK
54 + 13 ns/TCLK
%
Rise and Fall Times (20/80%)3
LVPECL/LVDS
460
ps
HCSL/Differential SSTL
800
ps
Differential CMOS, 15 pF, >80 MHz
1.1
1.6
ns
LVPECL Output Option
(DC coupling, 50
 to V
DD – 2.0 V)
3
Mid-level
VDD – 1.5
VDD – 1.34
V
Diff swing
.720
.880
VPK
Low Power LVPECL Output Option
(AC coupling, 100
 Differential
Load)3
Mid-level
N/A
V
Diff swing
.68
.95
VPK
LVDS Output Option (2.5/3.3 V)
(RTERM = 100  diff)
3
Mid-level
1.15
1.26
V
Diff swing
0.25
0.45
VPK
LVDS Output Option (1.8 V)
(RTERM = 100  diff)
3
Mid-level
0.85
0.96
V
Diff swing
0.25
0.45
VPK
HCSL Output Option3
Mid-level
0.35
0.425
V
Diff swing
0.65
0.82
VPK
DC termination per pad
45
55
CMOS Output Voltage3
VOH, sourcing 9 mA
VDD –0.6
V
VOL, sinking 9 mA
0.6
V
SSTL-1.8 Output Voltage4
VOH
VTT + 0.375
V
VOL
——
VTT – 0.375
SSTL-2.5 Output Voltage4
VOH
VTT + 0.48
V
VOL
——
VTT – 0.48
SSTL-3.3 Output Voltage5
VOH
VTT + 0.48
V
VOL
——
VTT – 0.48
Powerup Time
From time VDD crosses min spec
supply
——
2
ms
OE Deassertion to Clk Stop
250 + 3 x TCLK
ns
Return from Output Driver Stopped
Mode
250 + 3 x TCLK
ns
Return From Tri-State Time
12 + 3 x TCLK
µs
Parameters
Condition
Min
Typ
Max
Units
Notes:
1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4. VTT = .5 x VDD.
5. VTT = .45 x VDD.


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