AM50DL128BG85I datasheet(11/64 Pages) AMD

Teilenummer	AM50DL128BG85I

Bauteilbeschribung	Stacked Multi-Chip Package (MCP) Flash Memory and SRAM

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Hersteller	AMD [Advanced Micro Devices]

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Am50DL128BG

January 8, 2003

PR E L I M I N A R Y

MCP DEVICE BUS OPERATIONS

This section describes the requirements and use of

the device bus operations, which are initiated through

the internal command register. The command register

itself does not occupy any addressable memory loca-

tion. The register is a latch used to store the com-

mands, along with the address and data information

needed to execute the command. The contents of the

register serve as inputs to the internal state machine.

The state machine outputs dictate the function of the

device. Tables 1-2 lists the device bus operations, the

inputs and control levels they require, and the result-

ing output. The following subsections describe each of

these operations in further detail.

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