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ADF4007BCP Datenblatt(PDF) 11 Page - Analog Devices

Teilenummer ADF4007BCP
Bauteilbeschribung  High Frequency Divider/PLL Synthesizer
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ADF4007
Rev. 0 | Page 11 of 16
APPLICATIONS
FIXED HIGH FREQUENCY LOCAL OSCILLATOR
Figure 13 shows the ADF4007 being used with the
HMC358MS8G VCO from Hittite Microwave Corporation to
produce a fixed-frequency LO (local oscillator), which could be
used in satellite or CATV applications. In this case, the desired
LO is 6.7 GHz.
The reference input signal is applied to the circuit at FREFIN
and, in this case, is terminated in 50 Ω. Many systems would
have either a TCXO or an OCXO driving the reference input
without any 50 Ω termination. To bias the REFIN pin at AVDD/2,
ac coupling is used. The value of the coupling capacitor used
depends on the input frequency. The equivalent impedance at
the input frequency should be less than 10 Ω. Given that the dc
input impedance at the REFIN pin is 100 kΩ, less than 0.1% of
the signal is lost.
The charge pump output of the ADF4007 drives the loop filter.
In calculating the loop filter component values, a number of
items need to be considered. In this example, the loop filter was
designed so that the overall phase margin for the system is 45°.
Other PLL system specifications are as follows:
KD = 5 mA
KV = 100 MHz/V
Loop Bandwidth = 300 kHz
FPFD = 106 MHz
N = 64
All these specifications are needed and used with the
ADIsimPLL to derive the loop filter component values shown in
Figure 13.
The circuit in Figure 13 gives a typical phase noise performance
of −100 dBc/Hz at 10 kHz offset from the carrier. Spurs are
heavily attenuated by the loop filter and are below −90 dBc.
The loop filter output drives the VCO, which, in turn, is fed
back to the RF input of the PLL synthesizer and also drives the
RF output terminal. A T-circuit configuration provides 50 Ω
matching between the VCO output, the RF output, and the RFIN
terminal of the synthesizer.
ADF4007
N2
N1
M2
M1
100pF
100pF
100pF
CP
MUXOUT
5.6nF
51
18
22
NOTE
DECOUPLING CAPACITORS (0.1mF/10pF) ON AVDD, DVDD, AND VP OF THE ADF4007 AND ON
VCC OF THE AD820 AND THE HMC358MS8G HAVE BEEN OMITTED FROM THE DIAGRAM
TO AID CLARITY.
RSET
AVDD
DVDD VP
FREFIN
VCO
100MHz/V
HMC358MS8G
RSET
5.1k
6
17
18
8
20
15
19
9
3
2
10
RFINA
RFINB
5
4
11
12
13
14
GND
47nF
AVDD
7
DVDD
16
REFIN
AVDD = 3.3V
1k
18k
VCC = 12V
VCC = 3.3V
1k
AD820
10pF
18
100pF
18
Ω 100pF
RFOUT
LOGIC HI
LOGIC HI
LOGIC LO
LOGIC LO
Figure 13. 6.78 GHz Local Oscillator Using the ADF4007


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