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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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EZR32LG330FR69G Datenblatt(PDF) 7 Page - Silicon Laboratories |
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EZR32LG330FR69G Datenblatt(HTML) 7 Page - Silicon Laboratories |
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7 / 87 page  3.1.25 Operational Amplifier (OPAMP) The EZR32LG330 features 2 Operational Amplifiers. The Operational Amplifier is a versatile general purpose amplifier with rail-to-rail differential input and rail-to-rail single ended output. The input can be set to pin, DAC or OPAMP, whereas the output can be pin, OPAMP or ADC. The current is programmable and the OPAMP has various internal configurations such as unity gain, programmable gain using internal resistors, etc. 3.1.26 Low Energy Sensor Interface (LESENSE) The Low Energy Sensor Interface (LESENSE™), is a highly configurable sensor interface with support for up to 16 individually configu- rable sensors. By controlling the analog comparators and DAC, LESENSE is capable of supporting a wide range of sensors and meas- urement schemes, and can for instance measure LC sensors, resistive sensors and capacitive sensors. LESENSE also includes a pro- grammable FSM which enables simple processing of measurement results without CPU intervention. LESENSE is available in energy mode EM2, in addition to EM0 and EM1, making it ideal for sensor monitoring in applications with a strict energy budget. 3.1.27 Backup Power Domain The backup power domain is a separate power domain containing a Backup Real Time Counter, BURTC, and a set of retention regis- ters, available in all energy modes. This power domain can be configured to automatically change power source to a backup battery when the main power drains out. The backup power domain enables the EZR32LG330 to keep track of time and retain data, even if the main power source should drain out. 3.1.28 Advanced Encryption Standard Accelerator (AES) The AES accelerator performs AES encryption and decryption with 128-bit or 256-bit keys. Encrypting or decrypting one 128-bit data block takes 52 HFCORECLK cycles with 128-bit keys and 75 HFCORECLK cycles with 256-bit keys. The AES module is an AHB slave which enables efficient access to the data and key registers. All write accesses to the AES module must be 32-bit operations (i.e., 8- or 16-bit operations are not supported). 3.1.29 General Purpose Input/Output (GPIO) In the EZR32LG330, there are 38 General Purpose Input/Output (GPIO) pins, which are divided into ports with up to 16 pins each. These pins can individually be configured as either an output or input. More advanced configurations like open-drain, filtering and drive strength can also be configured individually for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Tim- er PWM outputs or USART communication, which can be routed to several locations on the device. The GPIO supports up to 16 asyn- chronous external pin interrupts, which enables interrupts from any pin on the device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other peripherals. EZR32LG330 Data Sheet System Overview silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 6 |
Ähnliche Teilenummer - EZR32LG330FR69G |
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Ähnliche Beschreibung - EZR32LG330FR69G |
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