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STD18N06LT4G-VF01 Datenblatt(PDF) 1 Page - ON Semiconductor |
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STD18N06LT4G-VF01 Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 7 page © Semiconductor Components Industries, LLC, 2016 November, 2018 − Rev. 8 1 Publication Order Number: NTD18N06L/D NTD18N06L, NTDV18N06L Power MOSFET 18 A, 60 V, Logic Level N−Channel DPAK Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. Features • AEC Q101 Qualified − NTDV18N06L • These Devices are Pb−Free and are RoHS Compliant Typical Applications • Power Supplies • Converters • Power Motor Controls • Bridge Circuits MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS 60 Vdc Drain−to−Gate Voltage (RGS = 10 MW) VDGR 60 Vdc Gate−to−Source Voltage − Continuous − Non−repetitive (tpv10 ms) VGS VGS ±15 ±20 Vdc Drain Current − Continuous @ TA = 25°C − Continuous @ TA = 100°C − Single Pulse (tpv10 ms) ID ID IDM 18 10 54 Adc Apk Total Power Dissipation @ TA = 25°C Derate above 25 °C Total Power Dissipation @ TA = 25°C (Note 2) PD 55 0.36 2.1 W W/ °C W Operating and Storage Temperature Range TJ, Tstg − 55 to +175 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 50 Vdc, VGS = 5.0 Vdc, L = 1.0 mH, IL(pk) = 12 A, VDS = 60 Vdc) EAS 72 mJ Thermal Resistance − Junction−to−Case − Junction−to−Ambient (Note 1) − Junction−to−Ambient (Note 2) RqJC RqJA RqJA 2.73 100 71.4 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8 ″ from case for 10 seconds TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. When surface mounted to an FR−4 board using the minimum recommended pad size. 2. When surface mounted to an FR−4 board using the 0.5 sq in drain pad size. N−Channel D S G 60 V 54 m W@5.0 V RDS(on) TYP 18 A (Note 1) ID MAX V(BR)DSS See detailed ordering and shipping information on page 2 of this data sheet. ORDERING INFORMATION A = Assembly Location* 18N6L = Device Code Y = Year WW = Work Week G = Pb−Free Device 1 Gate 3 Source 2 Drain 4 Drain DPAK CASE 369C STYLE 2 MARKING DIAGRAM & PIN ASSIGNMENT 1 2 3 4 www.onsemi.com * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. |
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