CDCVF2510PW datasheet(7/16 Pages) TI1

Teilenummer	CDCVF2510PW

Bauteilbeschribung	3.3-V PHASE-LOCK LOOP CLOCK DRIVER

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TYPICAL CHARACTERISTICS

3

8

13

18

23

28

33

C(LF) - Load Capacitance - pF

400

200

-400

-600

0

-200

600

38

CLK to Y1-n

CLK to FBOUT

VCC = 3.3 V

fc = 100 MHz

C(LY1-n) = 25 pF || 500 Ω

TA = 25°C

See Notes A, B, and C

3

8

13

18

23

28

33

400

200

-400

-600

0

-200

600

38

VCC = 3.3 V

fc = 133 MHz

C(LY1-n) = 25 pF || 500 Ω

TA = 25°C

See Notes A, B, and C

CLK to Y1-n

CLK to FBOUT

C(LF) - Load Capacitance - pF

-100

-150

-250

-300

-350

-400

-200

3.1

3.2

3.3

3.4

3.5

-50

0

VCC - Supply Voltage at FBOUT - V

3.6

3

fc = 133 MHz

C(LY) = 25 pF || 500 Ω

C(LF) = 12 pF || 500 Ω

TA = 25°C

See Notes A, B, and C

CLK to FBOUT

CDCVF2510

SCAS638C – JULY 2001 – REVISED APRIL 2006

STATIC PHASE ERROR

vs

LOAD CAPACITANCE

Figure 3.

Figure 4.

STATIC PHASE ERROR

vs

SUPPLY VOLTAGE AT FBOUT

Figure 5.

7

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