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TSE2004GB2C0 Datenblatt(PDF) 4 Page - Integrated Device Technology |
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TSE2004GB2C0 Datenblatt(HTML) 4 Page - Integrated Device Technology |
4 / 38 page 4 ©2017 Integrated Device Technology, Inc. May 15, 2017 TSE2004GB2C0 Datasheet Functional Description Serial Clock (SCL) This input signal is used to strobe all data in and out of the device. In applications where this signal is used by slave devices to synchronize the bus to a slower clock, the bus master must have an open drain output, and a pull-up resistor can be connected from Serial Clock (SCL) to VDDSPD (to calculate the value of the pull-up resistor, see Figure 3). In most applications, this method of synchronization is not employed and the pull-up resistor is not necessary, provided that the bus master has a push-pull (rather than open drain) output. Serial Data (SDA) This bi-directional signal is used to transfer data in or out of the device. It is an open drain output that may be wire-ORed with other open drain or open collector signals on the bus. A pull-up resistor must be connected from the Serial Data (SDA) to the most positive VDDSPD in the i2C Bus chain (to calculate the value of the pull-up resistor, see Figure 3). Figure 3. Maximum RL Value vs. Bus Capacitance (CBUS) for an I2C Bus Select Address (SA0, SA1, SA2) These input signals are used to create the Logical Serial Address (LSA) that is compared to the least significant bits (b3, b2, b1) of the 7-bit Slave Address (Table 2). The SA0 input is used to detect the VHV voltage when decoding an SWPn or CWP instruction. For decoding details (see Table 2). |
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