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LM3641 Datenblatt(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Teilenummer LM3641
Bauteilbeschribung  Lithium-Ion Battery Pack Protection Circuit
Download  16 Pages
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Hersteller  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM3641 Datenblatt(HTML) 7 Page - National Semiconductor (TI)

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Product Description
Normal charging of Li-Ion packs requires Constant Voltage
Constant Current (CVCC) chargers that terminate charging
at a voltage value just below the maximum protection volt-
age (V
MAX). Only in the event of an invalid charger or an out
of compliance charger operation should the protection IC ter-
minate charging.
OVERCHARGE PROTECTION
The IC protects the cell(s) against overcharge. Normally, the
cell voltage is sampled once a second. Four consecutive
samples of V
CELL > VMAX result in the MOSFET pair turning
OFF. The transient response for overvoltage requires one
sample at the t
SAMPLE period (1s typical) and three tSAMPLE-
OVERVOLTAGE
periods (0.25s typical). The first overcharge
event is asynchronous to the 1 second sampling so the delay
between the actual instance of overcharge and the first
sample can result anywhere in the range of zero to t
SAMPLE.
The requirement for 4 consecutive samples of V
CELL > VMAX
filters noise from the cell due to transient currents. Should
the cell voltage exceed V
MAX by more than 100 mV (VSAFE),
the MOSFETs will turn off on the first sample reading. This
provides an extra measure of safety. The return to conduc-
tion mode requires that a load be applied to the pack or
V
CELL < VMAX −20mV. AlsoaL→H signal on the Enable pin
will reset the GATE high, but if V
CELL > VMAX, the GATE will
go low again after 1.75 seconds. Whenever an overcharge
disconnect has occurred, a cell bypass resistor (
≈5kΩ)is
switched across the V
DD and VSS pins and the Full pin pulls
to near V
DD. The cell bypass resistor ensures that the cell is
discharged even though some component of R1’s current
will still flow in the cell, if a charger is applied. The cell by-
pass resistor is removed when V
CELL < VMAX again.
ACTIVE RECTIFICATION
Overcharged cells can be discharged by the application of a
load to the pack. Active Rectification is the biasing of the
power MOSFETs GATE so that the V
DS =VRECOVERY for dis-
charge currents. The MOSFETs turn OFF for charge cur-
rents. The Active Rectification amplifier assures uninter-
rupted conduction for discharge currents only. The Full pin’s
output impedance is
≈80 kΩ when active high (V
CELL >
V
MAX) and TRI-STATE when inactive (VCELL < VMAX). The
Full pin can optionally supply a small FET current necessary
to stabilize the Active Rectification loop by maintaining at
least (V
DD−1V)/R6+80k)•ID in the MOSFET. The Full pin’s
overcharge signal could be used in applications where the
charger is logically disabled by the protection circuit, a
change time-out circuit is initiated or whenever an over-
charge signal is otherwise desired. The Full signal will go low
(TRI-STATE with an external resistor pulldown) and cell by-
pass turns off if a cell decays to V
CELL < VMAX.
OVERDISCHARGE PROTECTION
The cell(s) are also protected against overdischarge. Four
consecutive 1 Hz samples of V
CELL < VMIN result in the
MOSFET pair turning OFF. Cells that have discharged below
V
MIN
due to long periods of self-discharge can still be
charged. Return to conduction mode for overdischarged
packs automatically occurs if a charger is applied to the
pack. Also a L→H signal on the Enable pin will reset the
GATE high, however if V
CELL < VMIN, the GATE will turn
OFF again in 4 seconds.
OVERCURRENT PROTECTION
The battery current is monitored continuously by measuring
the voltage across the internal sense resistor. If the terminal
current exceeds I
MAX-CHG (programmable) in the charge
mode for longer than t
OVERCURRENT, the MOSFET pair dis-
connects. Similarly, if the terminal current exceeds I
MAX-DIS
(programmable) in the discharge mode for longer than
t
OVERCURRENT, the MOSFET pair disconnects. Recovery to
conduction mode requires either 1) a momentary detach-
ment of the pack so the Enable pin can be cycled low, then
high or 2) a direct low to high signal to the Enable pin con-
trolled from logic.
ENABLE PIN
The pack can be protected from accidental short circuits
should the Enable pin be made available as a third battery
pack terminal. This third pack terminal is tied to the pack’s
positive terminal through a connection on either a valid
charger or load. Shorting the high impedance Enable pin to
the pack’s positive terminal enables all functions of the pro-
tection circuit. The Enable pin disables the MOSFET pair
whenever this pin is floating, such as when the battery pack
is detached from a valid load or charger. Floating the Enable
pin also forces the protection circuit into FET’s OFF mode to
maximize the shelf life of the battery pack. When the Enable
pin is used to recover from overcharge, overdischarge or
overcurrent events, the voltage measurement system
memory is cleared of previous results. If the MOSFET by-
pass resistor is active, and the Enable goes low, the bypass
resistor turns OFF. A series resistor of 470 k
Ω to1MΩ be-
tween the Enablel terminal of the pack and the Enable pin of
the IC, protects the IC from ESD events at the pack’s termi-
nals.
SLEEPMODE
Sleepmode is a reduced current state that occurs when the
Enable pin is floating or low. The FETs are turned OFF.
Sleepmode minimizes the artificial self-discharge of the pack
when the pack is not in use.
INVALID CHARGER
Assume a charger that exceeds the V
MAX rating of the IC is
applied to the pack. The power MOSFETs will eventually turn
OFF due to overcharge if I
CHARGER < IMAX-CHG, or turn OFF
due to overcurrent if the invalid charger’s current exceeds
I
MAX-CHG. If the charger was applied to the pack with the po-
larity reversed, then the MOSFETs would eventually turn
OFF due to either overdischarge or overcurrent depending
on the magnitude of the charger’s available current. In either
case, the voltage on the V− pin will be driven by the open cir-
cuit voltage of the charger. The V− pin is clamped by internal
diodes to V
DD and VSS and the pin’s current limited by R1
(see the typical curve “Pin Current vs. Pin Voltage”) with R1
= 100k, the pin current will not exceed the maximum recom-
mended value of ±200 µA for a ±20V invalid charger. Higher
invalid charger voltages can be tolerated when using higher
values for R1. Proper LCCE operation is not limited, even by
values for R1 in excess of 1 M
Ω.
www.national.com
7


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