Datenblatt-Suchmaschine für elektronische Bauteile |
|
ACE24AC04.08.16 Datenblatt(PDF) 7 Page - ACE Technology Co., LTD. |
|
ACE24AC04.08.16 Datenblatt(HTML) 7 Page - ACE Technology Co., LTD. |
7 / 18 page ACE24AC04.08.16 Two-wire Serial EEPROM VER 1.2 7 automatically increase by one. For current address read the micro-controller will not issue an acknowledge signal on the 18 th clock cycle. The micro-controller issues a valid stop bit after the 18 th clock cycle to terminate the read operation. The device then returns to standby mode. (B) Sequential Read The sequential read is very similar to current address read. The micro-controller issues a start bit and a valid device address word with read/write bit (8 th ) set to “1”. The EEPROM will response with an acknowledge signal on the 9 th serial clock cycle. An 8-bit data word will then be serially clocked out. Meanwhile the internally address word counter will then automatically increase by one. Unlike current address read, the micro-controller sends an acknowledge signal on the 18th clock cycle signaling the EEPROM device that it wants another byte of data. Upon receiving the acknowledge signal, the EEPROM will serially clocked out an 8-bit data word based on the incremented internal address counter. If the micro-controller needs another data, it sends out an acknowledge signal on the 27 th clock cycle. Another 8-bit data word will then be serially clocked out. This sequential read continues as long as the micro-controller sends an acknowledge signal after receiving a new data word. When the internal address counter reaches its maximum valid address, it rolls over to the beginning of the memory array address. Similar to current address read, the micro-controller can terminate the sequential read by not acknowledging the last data word received, but sending a stop bit afterwards instead. (C) Random Read Random read is a two-steps process. The first step is to initialize the internal address counter with a target read address usin g a “dummy write” instruction. The second step is a current address read. To initialize the internal address counter with a target read address, the micro-controller issues a start bit first, follows by a valid device address with the read/write bit (8 th ) set to “0”. The EEPROM will then acknowledge. The micro-controller will then send the address word. Again the EEPROM will acknowledge. Instead of sending a valid written data to the EEPROM, the micro-controller performs a current address read instruction to read the data. Note that once a start bit is issued, the EEPROM will reset the internal programming process and continue to execute the new instruction which is to read the current address. Figure 3: Byte Write Instruction (SDA Input) |
Ähnliche Teilenummer - ACE24AC04.08.16 |
|
Ähnliche Beschreibung - ACE24AC04.08.16 |
|
|
Link URL |
Privatsphäre und Datenschutz |
ALLDATASHEETDE.COM |
War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |